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公开(公告)号:DE69324952T2
公开(公告)日:1999-12-09
申请号:DE69324952
申请日:1993-03-17
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
IPC: H01L21/332 , H01L29/08 , H01L29/74 , H01L29/747 , H01L29/87 , H03K17/725 , H01L29/86
Abstract: The present invention relates to a switch for AC voltage comprising, between first and second main terminals (A1, A2), a first thyristor (Th1) in anti-parallel configuration with a first diode (D1) and in series with a second thyristor (Th2) in anti-parallel configuration with a second diode (D2). The first thyristor has a control terminal (G) connected to its trigger region. The second thyristor and the second diode are made vertically in a common substrate and their conduction regions are tightly nested, from which it follows that a reversal of polarity following a period of conduction of the second diode causes the second thyristor to conduct.
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公开(公告)号:DE69728937T2
公开(公告)日:2005-04-28
申请号:DE69728937
申请日:1997-07-24
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT , BERNIER ERIC
IPC: H01L29/73 , H01L21/331 , H01L27/06 , H01L29/732 , H01L29/74 , H01L29/744
Abstract: The structure includes an isolation wall (6) of a first conductivity type,formed in a semiconductor wafer (1) of a second conductivity type, separating a first portion of the wafer containing a high voltage thyristor with a layer corresponding to the wafer thickness, from a second portion containing logic circuit elements. The back face is uniformly coated with a metallisation layer (M1) in contact with the portions of the wafer. The thyristor is produced in lateral form, the isolation wall being in electrical contact with a control region of the same conductivity type as the thyristor and the logic portion includes a vertical component (20) with a main contact corresponding to the back face metallisation.
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公开(公告)号:FR2818824B1
公开(公告)日:2003-03-21
申请号:FR0016837
申请日:2000-12-21
Applicant: ST MICROELECTRONICS SA
Inventor: GUITTON FABRICE , PEZZANI ROBERT
Abstract: The invention concerns a control circuit for controlling a power switch by means of a galvanic insulation transformer, the transformer being produced in the form of planar conductive windings on an insulating substrate (20) whereon are integrated passive components constituting a high frequency excitation oscillating circuit for a primary winding of the transformer, the transformer substrate being directly mounted on a wafer (24) whereon is mounted a circuit chip (40) integrating the power switch.
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公开(公告)号:DE69902477D1
公开(公告)日:2002-09-12
申请号:DE69902477
申请日:1999-09-29
Applicant: ST MICROELECTRONICS SA
Inventor: RIVET BERTRAND , PEZZANI ROBERT
Abstract: The invention concerns a control circuit for controlling a load to be supplied in alternating current voltage, comprising a two-way switch capable of being controlled by phase angle, in series with the load between two terminals applying the alternating current supply, and comprising, in parallel with the switch, a first resistive element, a first capacitor and an element, in series with the first resistive element and the first capacitor, and operating, in steady state conditions, as a constant current source, the midpoint of the association in series connection of the first resistive element and the first capacitor being connected, via an element with two-way conduction automatically triggered when the voltage at its terminals exceeds a predetermined threshold, to a terminal controlling the switch.
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公开(公告)号:DE69522920D1
公开(公告)日:2001-10-31
申请号:DE69522920
申请日:1995-12-27
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
IPC: H01L29/73 , H01L21/331 , H01L21/761 , H01L21/822 , H01L21/8222 , H01L23/40 , H01L27/04 , H01L27/06 , H01L27/08 , H01L29/732 , H01L29/739 , H01L29/74 , H01L29/78 , H01L29/861 , H05K7/20
Abstract: Conventional vertical components can be formed directly in the n-substrate having rear face covered with metallisation (M) corresp. to a common electrode. One type of isolated component has an active layer of opposite conductivity type on the rear face and is isolated by relatively heavily doped walls (6) which are overlapped by the dielectric layer (7) between the active layer and the metallisation.
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公开(公告)号:DE69518602T2
公开(公告)日:2001-04-19
申请号:DE69518602
申请日:1995-10-24
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
Abstract: The circuit includes two series rectifier diodes (D1,D2) combining a thyristor (TR). A parallel diode (D3) at the thyristor input feeds the output circuit (D). The thyristor has a PNP transistor across it, with the base connected to the collector of an NPN transistor. The emitter is connected to earth via an external resistance (R). The base of the second transistor is connected to a microprocessor command circuit, which triggers the thyristor.
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公开(公告)号:DE69611858D1
公开(公告)日:2001-04-05
申请号:DE69611858
申请日:1996-05-15
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
IPC: H05B41/18 , H01L21/822 , H01L27/04 , H01L29/74 , H01L29/747 , H01L29/866 , H03K17/725 , H05B41/04
Abstract: The circuit includes a first thyristor (Th1) which has a trigger connected to the thyristor cathode via a first resistance (RG) and connected to the anode via a low voltage Zener diode (Z) connected in series. The first thyristor is formed vertically with a second thyristor (Th2). The Zener diode is of lateral type and the diode cathode is coupled to the cathode of the second thyristor by metallisation forming the output terminal (2). The Zener diode is manufactured in the trigger section of the first thyristor.
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公开(公告)号:DE69518602D1
公开(公告)日:2000-10-05
申请号:DE69518602
申请日:1995-10-24
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
Abstract: The circuit includes two series rectifier diodes (D1,D2) combining a thyristor (TR). A parallel diode (D3) at the thyristor input feeds the output circuit (D). The thyristor has a PNP transistor across it, with the base connected to the collector of an NPN transistor. The emitter is connected to earth via an external resistance (R). The base of the second transistor is connected to a microprocessor command circuit, which triggers the thyristor.
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公开(公告)号:DE69327388D1
公开(公告)日:2000-01-27
申请号:DE69327388
申请日:1993-10-25
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
IPC: H01L27/102 , H01L29/10 , H01L29/423 , H01L29/74 , H01L29/41
Abstract: The present invention relates to a thyristor comprising a vertical thyristor including, on its front face, a localised anode region (P2) and, on the rear face, a cathode metallisation (K) covering substantially all of this rear face and, on the side of the front face, a lateral thyristor (tl). The trigger of the thyristor corresponds to the cathode (c) or cathode trigger (g) region of the lateral thyristor. The cathode trigger (g) or cathode (c) region respectively, of the lateral thyristor, is linked to the cathode of the vertical thyristor.
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公开(公告)号:DE69721865D1
公开(公告)日:2003-06-18
申请号:DE69721865
申请日:1997-02-25
Applicant: ST MICROELECTRONICS SA
Inventor: PEZZANI ROBERT
IPC: H03K17/725 , H01L29/747
Abstract: The three state switch has two thyristors (TR1,TR2) which are placed in parallel across the mains circuit (A1,A2) with a series load. The two thyristors are placed in opposite current flow directions. There is a voltage operated switch (20) which applies positive or negative voltages to the anode of one thyristor and the cathode of the second thyristor. The switch has a third open circuit position. Switching the thyristors allows positive or negative current flow or zero flow through the mains circuit.
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