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31 records (took 0.032 seconds)

    22.
    发明专利
    未知

    公开(公告)号：IT1311277B1

    公开(公告)日：2002-03-12

    申请号：ITTO991148

    申请日：1999-12-23

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MARINO FILIPPO ,  CAPICI SALVATORE

    IPC: G01R31/28 ,  H01L23/495

    Abstract: A method of making and testing an electronic device that includes providing first and second external pins, first and second pads on the substrate connected to the first external pin by respective bonding wires, and third and fourth pads on the substrate connected to the second external pin respective bonding wires, and to a first common line by respective resistors. With a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

    26.
    发明专利
    未知

    公开(公告)号：DE69929033D1

    公开(公告)日：2006-01-26

    申请号：DE69929033

    申请日：1999-04-29

    Applicant: ST MICROELECTRONICS SRL

    Inventor： PAPPALARDO SALVATORE ,  PULVIRENTI FRANCESCO ,  MARINO FILIPPO

    IPC: H02J7/00 ,  H02M3/156

    Abstract: The DC-DC converter (1') comprises a current error amplifier (32') and a voltage error amplifier (42') connected in parallel to control the charging of the battery (18) and a gradual turning off circuit (44', 60) for turning off gradually the current error amplifier (32') in a battery charging end phase. In this way, the DC-DC converter is able to supply to the battery (18) a battery charging current that remains constant up until the battery full charge voltage is reached.

    27.
    发明专利
    未知

    公开(公告)号：DE69921093T2

    公开(公告)日：2005-11-10

    申请号：DE69921093

    申请日：1999-05-10

    Applicant: ST MICROELECTRONICS SRL

    Inventor： D ARRIGO ANGELO ,  CAPICI SALVATORE ,  MARINO FILIPPO ,  PULVIRENTI FRANCESCO

    IPC: H02J7/00 ,  H02M3/156

    Abstract: The frequency translator (72) is usable in a switching DC-DC converter of the type operating as a voltage regulator and as a battery charger. The frequency translator (72) receives at inputs a division voltage (VFB) proportional to a present value of the output voltage (VOUT) of the DC-DC converter (70), a reference voltage (VREF) correlated to a nominal value of the output voltage (VOUT), and a limiting signal (VL) indicative of a normal operation or of current limitation operation of the DC-DC converter (70), and supplies at an output (72u) a bias current (IBIAS) which is supplied to an input of an oscillator (32) supplying at an output a comparison signal (VC) presenting a periodic pattern with a frequency which is correlated to the bias current (IBIAS). In particular, the frequency translator (72) operates in a way such as to regulate a frequency translation of the comparison signal (VC) as a function of the difference between the division voltage (VFB) and the reference voltage (VREF) only when the DC-DC converter (70) is operating in the current limitation condition.

    28.
    发明专利
    未知

    公开(公告)号：DE69915293D1

    公开(公告)日：2004-04-08

    申请号：DE69915293

    申请日：1999-10-22

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CAPICI SALVATORE VINCENZO ,  MARINO FILIPPO

    IPC: H03K17/0412 ,  H03K17/687

    Abstract: The invention relates to a driver circuit for P-channel MOS switches, of the type comprising: a power transistor (2) having a control terminal (G) and having first (D) and second (S) conduction terminals; a controlled current generator (ION) connected to said control terminal (G) for turning on the power transistor (2); a control circuit (5) for controlling the turning on of said current generator (ION); and a protection circuit (3) coupled to said control terminal (G). The driver circuit (1) further comprises a second current generator (IOFF) connected to the control terminal (G) of the power transistor (2) and in turn driven by the control circuit (5) to control the transistor turn-off. Advantageously, the control circuit (5) also receives a control signal (STOP) from the protection circuit (3) at the end of the latter's action.

    29.
    发明专利
    未知

    公开(公告)号：DE69910566D1

    公开(公告)日：2003-09-25

    申请号：DE69910566

    申请日：1999-09-14

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CAPICI SALVATORE ,  MARINO FILIPPO

    IPC: G01R31/30 ,  G06F11/00

    Abstract: The invention relates to a method and an electronic circuit for carrying out a trimming operation on integrated circuit portions (2) which are provided with at least first (D) and second (E) access terminals. The circuit of this invention comprises: memory elements; a circuit means for modifying, either temporarily or permanently, the state of the memory elements, which means includes: an error amplifier (4) having an input connected to the second terminal (E) for comparing an output voltage from the circuit portion (2) with an internal voltage reference (Vref), a comparator (5) having an input connected to the output of the error amplifier, a direct connection of the first terminal (D) to the comparator (5) input; a controlled switch (S2) between the output of the error amplifier (4) and the input of the comparator (5); a second comparator (15) having an input connected to the second terminal (E) and the output connected to control said controlled switch (S2); a control logic (18) for controlling the trimming operation; a serial interface (25) adapted to receive, from said first terminal (D), a data sequence relating to the trimming operation for said control logic (18), through another controlled switch (S1).

    30.
    发明专利
    未知

    公开(公告)号：ITMI20012605A1

    公开(公告)日：2003-06-11

    申请号：ITMI20012605

    申请日：2001-12-11

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MARINO FILIPPO ,  CAMPO VINCENZO

    IPC: H02M3/158

    Abstract: A switching power supply circuit is provided for capacitor charging, wherein a power device is coupled to a terminal node of a capacitor to be charged and has a control terminal coupled to the output of an associated drive circuit. This circuit includes a second power element being associated with the first power device, coupled to said terminal node, and provided with a control terminal which is connected directly to the output of respective drive logic. The second power element is driven to turn on when a voltage below a predetermined minimum is present at the capacitor, thereby pulling the voltage at the terminal node to ground and further charging the capacitor.

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