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12 records (took 0.023 seconds)

    1.
    发明专利
    未知

    公开(公告)号：DE69921093D1

    公开(公告)日：2004-11-18

    申请号：DE69921093

    申请日：1999-05-10

    Applicant: ST MICROELECTRONICS SRL

    Inventor： D ARRIGO ANGELO ,  CAPICI SALVATORE ,  MARINO FILIPPO ,  PULVIRENTI FRANCESCO

    IPC: H02J7/00 ,  H02M3/156

    Abstract: The frequency translator (72) is usable in a switching DC-DC converter of the type operating as a voltage regulator and as a battery charger. The frequency translator (72) receives at inputs a division voltage (VFB) proportional to a present value of the output voltage (VOUT) of the DC-DC converter (70), a reference voltage (VREF) correlated to a nominal value of the output voltage (VOUT), and a limiting signal (VL) indicative of a normal operation or of current limitation operation of the DC-DC converter (70), and supplies at an output (72u) a bias current (IBIAS) which is supplied to an input of an oscillator (32) supplying at an output a comparison signal (VC) presenting a periodic pattern with a frequency which is correlated to the bias current (IBIAS). In particular, the frequency translator (72) operates in a way such as to regulate a frequency translation of the comparison signal (VC) as a function of the difference between the division voltage (VFB) and the reference voltage (VREF) only when the DC-DC converter (70) is operating in the current limitation condition.

    2.
    发明专利
    未知

    公开(公告)号：DE69910566T2

    公开(公告)日：2004-06-24

    申请号：DE69910566

    申请日：1999-09-14

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CAPICI SALVATORE ,  MARINO FILIPPO

    IPC: G01R31/30 ,  G06F11/00

    Abstract: The invention relates to a method and an electronic circuit for carrying out a trimming operation on integrated circuit portions (2) which are provided with at least first (D) and second (E) access terminals. The circuit of this invention comprises: memory elements; a circuit means for modifying, either temporarily or permanently, the state of the memory elements, which means includes: an error amplifier (4) having an input connected to the second terminal (E) for comparing an output voltage from the circuit portion (2) with an internal voltage reference (Vref), a comparator (5) having an input connected to the output of the error amplifier, a direct connection of the first terminal (D) to the comparator (5) input; a controlled switch (S2) between the output of the error amplifier (4) and the input of the comparator (5); a second comparator (15) having an input connected to the second terminal (E) and the output connected to control said controlled switch (S2); a control logic (18) for controlling the trimming operation; a serial interface (25) adapted to receive, from said first terminal (D), a data sequence relating to the trimming operation for said control logic (18), through another controlled switch (S1).

    4.
    发明专利
    未知

    公开(公告)号：IT1301756B1

    公开(公告)日：2000-07-07

    申请号：ITMI981405

    申请日：1998-06-19

    Applicant: ST MICROELECTRONICS SRL

    Inventor： CAPICI SALVATORE ,  MARINO FILIPPO

    IPC: G05F3/30

    Abstract: A voltage regulator circuit produces a voltage reference with high line rejection even for low values of the supply voltage. The regulator is of the type that produces a regulated voltage value for a bandgap voltage generator and includes a regulation circuit portion and a reference circuit portion. The regulation circuit portions is supplied with the supply voltage and has an output at which the regulated voltage value is produced and an input that receives a voltage reference. The reference circuit portion produces the voltage reference and includes a first circuit leg that receives the supply voltage through a controlled switch and a second circuit leg that receives the regulated voltage value.

    6.
    发明专利
    未知

    公开(公告)号：ITTO991148D0

    公开(公告)日：1999-12-23

    申请号：ITTO991148

    申请日：1999-12-23

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MARINO FILIPPO ,  CAPICI SALVATORE

    IPC: G01R31/28 ,  H01L23/495

    Abstract: A method of making and testing an electronic device that includes providing first and second external pins, first and second pads on the substrate connected to the first external pin by respective bonding wires, and third and fourth pads on the substrate connected to the second external pin respective bonding wires, and to a first common line by respective resistors. With a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

    8.
    发明专利
    未知

    公开(公告)号：IT1311277B1

    公开(公告)日：2002-03-12

    申请号：ITTO991148

    申请日：1999-12-23

    Applicant: ST MICROELECTRONICS SRL

    Inventor： MARINO FILIPPO ,  CAPICI SALVATORE

    IPC: G01R31/28 ,  H01L23/495

    Abstract: A method of making and testing an electronic device that includes providing first and second external pins, first and second pads on the substrate connected to the first external pin by respective bonding wires, and third and fourth pads on the substrate connected to the second external pin respective bonding wires, and to a first common line by respective resistors. With a circuit configuration of this type, the intactness of the bonding wires can easily be checked by carrying out a simple resistance measurement between the first and the second external pin.

    10.
    发明专利
    未知

    公开(公告)号：DE69921093T2

    公开(公告)日：2005-11-10

    申请号：DE69921093

    申请日：1999-05-10

    Applicant: ST MICROELECTRONICS SRL

    Inventor： D ARRIGO ANGELO ,  CAPICI SALVATORE ,  MARINO FILIPPO ,  PULVIRENTI FRANCESCO

    IPC: H02J7/00 ,  H02M3/156

    Abstract: The frequency translator (72) is usable in a switching DC-DC converter of the type operating as a voltage regulator and as a battery charger. The frequency translator (72) receives at inputs a division voltage (VFB) proportional to a present value of the output voltage (VOUT) of the DC-DC converter (70), a reference voltage (VREF) correlated to a nominal value of the output voltage (VOUT), and a limiting signal (VL) indicative of a normal operation or of current limitation operation of the DC-DC converter (70), and supplies at an output (72u) a bias current (IBIAS) which is supplied to an input of an oscillator (32) supplying at an output a comparison signal (VC) presenting a periodic pattern with a frequency which is correlated to the bias current (IBIAS). In particular, the frequency translator (72) operates in a way such as to regulate a frequency translation of the comparison signal (VC) as a function of the difference between the division voltage (VFB) and the reference voltage (VREF) only when the DC-DC converter (70) is operating in the current limitation condition.

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