公开(公告)号：EP0684699B1

公开(公告)日：2001-10-24

申请号：EP94830249.2

申请日：1994-05-25

Applicant: STMicroelectronics S.r.l. ,  Consorzio per la Ricerca sulla Microelettronica nel Mezzogiorno - CoRiMMe

Inventor： Pulvirenti, Francesco ,  Bontempo, Gregorio ,  Gariboldi, Roberto

IPC: H03G1/00 ,  H03K17/16 ,  H03K17/04

CPC classification number: H03G1/0029 ,  H03G1/0023 ,  H03K17/04206 ,  H03K17/166 ,  H03K2217/0036

公开(公告)号：EP0896268B1

公开(公告)日：2001-06-13

申请号：EP97830415.2

申请日：1997-08-07

Applicant: STMicroelectronics S.r.l.

Inventor： Genova, Angelo ,  Cantone, Giuseppe ,  Gariboldi, Roberto

IPC: G05F1/00 ,  G05F1/575 ,  H03K17/16

CPC classification number: H03K17/162 ,  G05F3/262

公开(公告)号：EP0991305A1

公开(公告)日：2000-04-05

申请号：EP98118405.4

申请日：1998-09-29

Applicant: Patent-Treuhand-Gesellschaft für elektrische Glühlampen mbH ,  STMicroelectronics S.r.l.

Inventor： Fischer, Klaus ,  Gariboldi, Roberto ,  Cantone, Giuseppe

IPC: H05B41/42 ,  H05B37/02

CPC classification number: H05B37/0263 ,  H05B41/42

Abstract: A circuit is described with which an operation circuit for a discharge lamp can be switched between operation states with different lamp currents by short interruptions of the power supply. Long interruptions than a certain time threshold result in basic state operation.

Abstract translation: 的电路进行说明，用以运算电路用于放电灯可与由电源的短中断不同的灯电流操作状态之间进行切换。 长时间的中断比在基本状态运行一定时间的阈值的结果。

公开(公告)号：EP0887933A1

公开(公告)日：1998-12-30

申请号：EP97830298.2

申请日：1997-06-24

Applicant: STMicroelectronics S.r.l.

Inventor： Tarantola, Mario ,  Cantone, Giuseppe ,  Genova, Angelo ,  Gariboldi, Roberto

IPC: H03K17/06

CPC classification number: H03K17/063 ,  H03K2217/0018

Abstract: A circuit for charging a capacitance (C) by means of an LDMOS integrated transistor (LD) functioning as a source follower and controlled, in a manner to emulate a high voltage charging diode of the capacitance, via a bootstrap capacitor (Cp) charged by a diode at the supply voltage (Vs) of the circuit, by an inverter (IO1) driven by a logic control circuit in function of a Low Gate Drive Signal and of a second logic signal (UVLOb) which is active during a phase wherein the supply voltage (Vs) is lower than the minimum switch-on voltage of the integrated circuit, uses a first zener diode (Z1) to charge the bootstrap (Cp) and the source of the (LD) transistor is connected to the supply node (Vs) through a second zener diode (Z2).

Abstract translation: 一种用于通过用作源极跟随器的LDMOS集成晶体管（LD）对电容（C）进行充电的电路，其通过经由自举电容器（Cp）的电容器（Cp）来模拟电容器的高电压充电二极管 通过由低栅极驱动信号的功能的逻辑控制电路驱动的反相器（IO1）和在阶段期间有效的第二逻辑信号（UVLOb）的电路的电源电压（Vs）处的二极管， 电源电压（Vs）低于集成电路的最小接通电压，使用第一齐纳二极管（Z1）对自举（Cp）充电，并且（LD）晶体管的源极连接到电源节点 Vs）通过第二齐纳二极管（Z2）。

公开(公告)号：EP0887932A1

公开(公告)日：1998-12-30

申请号：EP97830297.4

申请日：1997-06-24

Applicant: STMicroelectronics S.r.l.

Inventor： Genova, Angelo ,  Tarantola, Mario ,  Cantone, Giuseppe ,  Gariboldi, Roberto

IPC: H03K17/06

CPC classification number: H03K17/063 ,  H03K2217/0018

Abstract: A circuit for charging a capacitance (C) by mens of an LDMOS (LD) integrated transistor controlled in a manner to emulate a high voltage charging diode of the capacitance and comprising a circuital device to avert the switch-on parasitic PNP transistors of the LDMOS structure during transient states, composed of a number n of junctions (d1, D2, .. , Dn) directly biased between a source node (S) and a body node (VB) of the LDMOS transistor, at least a current generator (I), referred to the potential of a ground node of the circuit, at least a switch (SW1) between said source node (S) and the first junction (D1) of said chain of directly biased junctions and a limiting resistance (R1) connected between said body node and said current generator (I) referred to ground in which the (SW1) switch is open during a charging phase of the capacitance (C) and is closed when the charging voltage of the capacitance goes over a preestablished threshold by a control signal, further comprises

switching means (Sd1, Sd2, Sd3, Sd4) controlled by a logic signal (UVLO), active during the phase in which the supply voltage (Vs) of the integrated circuit is lower than the minimum switch-on voltage of the same integrated circuit, for charging said body node (VB) with a current whose maximum value is limited to a preestablished value.

Abstract translation: 一种用于以模拟高电压充电二极管的方式控制的LDMOS（LD）集成晶体管的电容（C）进行充电的电路，并且包括电路装置以反转LDMOS的接通的寄生PNP晶体管 由在直接偏置在LDMOS晶体管的源极节点（S）和体节点（VB）之间的n个结（d1，D2，...，Dn）组成的至少一个电流发生器（I ）指的是电路的接地节点的电位，至少在所述源极节点（S）和所述直接偏置接合链的第一结（D1）之间的开关（SW1）和连接的限制电阻（R1） 在所述体节点和所述电流发生器（I）之间称为接地，其中（SW1）开关在电容（C）的充电阶段期间断开，并且当电容的充电电压超过预先建立的阈值时闭合 控制信号还包括切换 由逻辑信号（UVLO）控制的装置（Sd1，Sd2，Sd3，Sd4）在集成电路的电源电压（Vs）低于同一集成电路的最小接通电压的相位中有效， 用于用最大值被限制为预定值的电流对所述身体节点（VB）进行充电。