公开(公告)号：EP0957515A1

公开(公告)日：1999-11-17

申请号：EP98830299.8

申请日：1998-05-15

Applicant: STMicroelectronics S.r.l.

Inventor： Barlocchi, Gabriele ,  Villa, Flavio Francesco

IPC: H01L21/762

CPC classification number: H01L21/7624 ,  H01L21/76224 ,  H01L21/76264 ,  H01L21/7627 ,  H01L21/76283

Abstract: The method comprises the steps of: forming doped regions (11, 18) on a monocrystalline substrate (2); growing an epitaxial layer (16); forming trenches (25) in the epitaxial layer as far as the doped regions (18); anodising the doped regions (18) in an electron-galvanic cell to form porous silicon regions (18'); oxidising the porous silicon regions; removing the oxidised porous silicon regions (18'') thereby forming a buried air gap (27); thermally oxidising the wafer (15) thereby growing an oxide region (30) from the walls of the buried air gap (27) and the trenches (25), until the buried air gap and the trenches themselves are completely filled.

Abstract translation: 该方法包括以下步骤：在单晶衬底（2）上形成掺杂区（11,18）; 生长外延层（16）; 在所述外延层中形成直到所述掺杂区域（18）的沟槽（25）; 在电子 - 电池中阳极氧化掺杂区域（18）以形成多孔硅区域（18'）; 氧化多孔硅区域; 去除氧化的多孔硅区域（18“），由此形成掩埋气隙（27）; 热氧化晶片（15），从而从掩埋气隙（27）和沟槽（25）的壁生长氧化物区域（30），直到埋入的气隙和沟槽本身完全充满。