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公开(公告)号:US20190056538A1
公开(公告)日:2019-02-21
申请号:US16166882
申请日:2018-10-22
Applicant: Sensor Electronic Technology, Inc.
Inventor: Alexander Dobrinsky , Michael Shur
Abstract: A diffusive layer including a laminate of a plurality of transparent films is provided. At least one of the plurality of transparent films includes a plurality of diffusive elements with a concentration that is less than a percolation threshold. The plurality of diffusive elements are optical elements that diffuse light that is impinging on such element. The plurality of diffusive elements can be diffusively reflective, diffusively transmitting or combination of both. The plurality of diffusive elements can include fibers, grains, domains, and/or the like. The at least one film can also include a powder material for improving the diffusive emission of radiation and a plurality of particles that are fluorescent when exposed to radiation.
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22.
公开(公告)号:US10211048B2
公开(公告)日:2019-02-19
申请号:US13756806
申请日:2013-02-01
Applicant: Sensor Electronic Technology, Inc.
Inventor: Wenhong Sun , Rakesh Jain , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Remigijus Gaska , Michael Shur
Abstract: A solution for fabricating a semiconductor structure is provided. The semiconductor structure includes a plurality of semiconductor layers grown over a substrate using a set of epitaxial growth periods. During each epitaxial growth period, a first semiconductor layer having one of: a tensile stress or a compressive stress is grown followed by growth of a second semiconductor layer having the other of: the tensile stress or the compressive stress directly on the first semiconductor layer. One or more of a set of growth conditions, a thickness of one or both of the layers, and/or a lattice mismatch between the layers can be configured to create a target level of compressive and/or shear stress within a minimum percentage of the interface between the layers.
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公开(公告)号:US20190035968A1
公开(公告)日:2019-01-31
申请号:US16145947
申请日:2018-09-28
Applicant: Sensor Electronic Technology, Inc.
Inventor: Alexander Dobrinsky , Michael Shur
IPC: H01L33/00 , H01L31/0352 , H01L31/0224 , H01L31/0304 , H01L33/40 , H01L33/32 , H01L33/08 , H01L33/06 , H01L31/109
CPC classification number: H01L33/0025 , H01L31/022408 , H01L31/03048 , H01L31/035227 , H01L31/035236 , H01L31/035272 , H01L31/109 , H01L33/025 , H01L33/04 , H01L33/06 , H01L33/08 , H01L33/18 , H01L33/32 , H01L33/405
Abstract: A semiconductor heterostructure including a polarization doped region is described. The region can correspond to an active region of a device, such as an optoelectronic device. The region includes an n-type semiconductor side and a p-type semiconductor side and can include one or more quantum wells located there between. The n-type and/or p-type semiconductor side can be formed of a group III nitride including aluminum and indium, where a first molar fraction of aluminum nitride and a first molar fraction of indium nitride increase (for the n-type side) or decrease (for the p-type side) along a growth direction to create the n- and/or p-polarizations.
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公开(公告)号:US10183085B2
公开(公告)日:2019-01-22
申请号:US15436945
申请日:2017-02-20
Applicant: Sensor Electronic Technology, Inc.
Inventor: Alexander Dobrinsky , Michael Shur , Remigijus Gaska , Timothy James Bettles
IPC: G01J1/42 , A61L2/10 , A61L2/24 , A61L9/20 , G01N21/64 , A61L9/00 , A41D13/002 , G09B5/06 , G09B19/24
Abstract: A system capable of detecting and/or sterilizing surface(s) of an object using ultraviolet radiation is provided. The system can include a disinfection chamber and/or handheld ultraviolet unit, which includes ultraviolet sources for inducing fluorescence in a contaminant and/or sterilizing a surface of an object. The object can comprise a protective suit, which is worn by a user and also can include ultraviolet sources for disinfecting air prior to the air entering the protective suit. The system can be implemented as a multi-tiered system for protecting the user and others from exposure to the contaminant and sterilizing the protective suit after exposure to an environment including the contaminant.
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公开(公告)号:US10147854B2
公开(公告)日:2018-12-04
申请号:US15388468
申请日:2016-12-22
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Saulius Smetona , Alexander Dobrinsky , Michael Shur , Mikhail Gaevski
IPC: H01L33/56 , H01L33/48 , H01L33/50 , H01L33/58 , H01L23/00 , H01L33/00 , G02B3/00 , G02B6/42 , B29L31/00 , B29L31/34 , B29C51/12
Abstract: A solution for packaging an optoelectronic device using an ultraviolet transparent polymer is provided. The ultraviolet transparent polymer material can be placed adjacent to the optoelectronic device and/or a device package on which the optoelectronic device is mounted. Subsequently, the ultraviolet transparent polymer material can be processed to cause the ultraviolet transparent polymer material to adhere to the optoelectronic device and/or the device package. The ultraviolet transparent polymer can be adhered in a manner that protects the optoelectronic device from the ambient environment.
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公开(公告)号:US20180323345A1
公开(公告)日:2018-11-08
申请号:US16025186
申请日:2018-07-02
Applicant: Sensor Electronic Technology, Inc.
Inventor: Alexander Dobrinsky , Maxim S. Shatalov , Mikhail Gaevski , Michael Shur
IPC: H01L33/38 , H01L33/06 , H01L33/12 , H01L33/14 , H01L33/22 , H01L33/32 , H01L33/40 , H01L33/46 , H01L33/00 , H01L31/0352 , H01L31/0236 , H01L31/0304 , H01L31/0224 , H01L31/0232 , H01L31/0216 , H01L31/18
CPC classification number: H01L33/387 , H01L31/02161 , H01L31/022408 , H01L31/02327 , H01L31/02363 , H01L31/03048 , H01L31/035236 , H01L31/1848 , H01L31/1852 , H01L31/1864 , H01L33/007 , H01L33/0095 , H01L33/04 , H01L33/06 , H01L33/12 , H01L33/145 , H01L33/20 , H01L33/22 , H01L33/32 , H01L33/38 , H01L33/405 , H01L33/46 , H01L2933/0016 , H01L2933/0025 , H01L2933/0091
Abstract: An optoelectronic device with a multi-layer contact is described. The optoelectronic device can include an n-type semiconductor layer having a surface. A mesa can be located over a first portion of the surface of the n-type semiconductor layer and have a mesa boundary, which has a shape including a plurality of interconnected fingers. The n-type semiconductor layer can have a shape at least partially defined by the mesa boundary. A first n-type contact layer can be located adjacent to another portion of the n-type semiconductor contact layer, where the first n-type contact layer forms an ohmic contact with the n-type semiconductor layer. A second contact layer can be located over a second portion of the n-type semiconductor contact layer, where the second contact layer is formed of a reflective material.
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公开(公告)号:US20180323071A1
公开(公告)日:2018-11-08
申请号:US16022939
申请日:2018-06-29
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Jinwei Yang , Wenhong Sun , Rakesh Jain , Michael Shur , Remigijus Gaska
Abstract: A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.
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公开(公告)号:US10090210B2
公开(公告)日:2018-10-02
申请号:US15283459
申请日:2016-10-03
Applicant: Sensor Electronic Technology, Inc.
Inventor: Maxim S. Shatalov , Mikhail Gaevski , Igor Agafonov , Robert M. Kennedy , Alexander Dobrinsky , Michael Shur , Emmanuel Lakios
IPC: H01L21/687 , H01L21/66 , H01L21/67 , H01L21/302 , H01L21/02 , H01L29/06 , C23C16/458 , C23C16/46
Abstract: A metal-organic chemical vapor deposition (MOCVD) growth with temperature controlled layer is described. A substrate or susceptor can have a temperature controlled layer formed thereon to adjust the temperature uniformity of a MOCVD growth process used to epitaxially grow semiconductor layers. In one embodiment, the substrate and/or the susceptor can be profiled with a shape that improves temperature uniformity during the MOCVD growth process. The profiled shape can be formed with material that provides a desired temperature distribution to the substrate that is in accordance with a predetermined temperature profile for the substrate for a particular MOCVD process.
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公开(公告)号:US20180269355A1
公开(公告)日:2018-09-20
申请号:US15989275
申请日:2018-05-25
Applicant: Sensor Electronic Technology, Inc.
Inventor: Rakesh Jain , Wenhong Sun , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
IPC: H01L33/12
CPC classification number: H01L33/12 , C30B25/04 , C30B25/183 , C30B29/406 , H01L21/0242 , H01L21/0243 , H01L21/02458 , H01L21/0254 , H01L21/02639 , H01L21/0265 , H01L29/2003 , H01L29/205 , H01L29/518 , H01L29/7786 , H01L29/7787 , H01L33/007 , H01L33/0075 , H01L33/06 , H01L33/10 , H01L33/145 , H01L33/22 , H01L33/24 , H01L33/32 , H01L33/405 , H01L2933/0091
Abstract: A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions. A device including one or more of these features also is provided.
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公开(公告)号:US10050175B2
公开(公告)日:2018-08-14
申请号:US15797263
申请日:2017-10-30
Applicant: Sensor Electronic Technology, Inc.
Inventor: Rakesh Jain , Wenhong Sun , Jinwei Yang , Maxim S. Shatalov , Alexander Dobrinsky , Michael Shur , Remigijus Gaska
IPC: H01L27/15 , H01L31/072 , H01L33/06 , H01L21/02 , H01L29/778 , H01L33/12 , H01L33/24 , H01L33/32 , H01L29/20 , H01L29/51 , H01L33/22
Abstract: A device having a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, is provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-III nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.
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