SELECTION CIRCUIT
    21.
    发明专利

    公开(公告)号:JPH0529961A

    公开(公告)日:1993-02-05

    申请号:JP18240091

    申请日:1991-07-23

    Applicant: TOSHIBA CORP

    Abstract: PURPOSE:To prevent malfunction by selecting any input signal corresponding to each of plural select data setting means respectively when plural means with '1' set thereto are in existence among the plural select data setting means so as to selectively output one of the input signals regardless of the setting state of each switch. CONSTITUTION:Only when a switch SW1 is turned on, a select data 011 is inputted to a selector SEL, the selector selects an input terminal D3 to select a signal S2. When only a switch SW2 is closed, the selector receives a select data 101 to select an input terminal D5 and a signal S2. Only when the switches SW1, SW2 are closed, the selector receives a data 001 to select the input terminal D1 and the signal S1 given to the input terminal D1. Thus, a signal corresponding to a closed switch is selected in this way. When plural switches are closed, a signal with high priority is selected.

    Demodulator circuit and wireless communication device
    22.
    发明专利
    Demodulator circuit and wireless communication device 审中-公开
    解调器电路和无线通信设备

    公开(公告)号:JP2014033296A

    公开(公告)日:2014-02-20

    申请号:JP2012171792

    申请日:2012-08-02

    Inventor: FUJII YASUYUKI

    Abstract: PROBLEM TO BE SOLVED: To provide a demodulator circuit adapted to expand a frequency pull-in range and prevent degradation in reception characteristic at the same time, without enlarging the circuit scale.SOLUTION: According to an embodiment, a demodulator circuit is installed in a communication device provided with a preprocessing unit for preprocessing a digitally modulated received signal, an analog/digital converter for converting the preprocessed received signal into digital quantity to generate a digital signal, and a loop filter for generating a control voltage for an oscillator which generates a clock signal. The demodulator circuit is provided with a conversion unit for converting a digital signal into a baseband signal, a detection unit, and a pulse width variable unit. The detection unit detects sign inversion of the baseband signal, and outputs, to the loop filter, a phase error information pulse indicating a phase error between a clock component extracted from the baseband signal on the basis of sign inversion timing and the clock signal. When carrier synchronization is not established yet, the pulse width variable unit changes the pulse width of the phase error information pulse to make it wider than the pulse width of the phase error information pulse after carrier synchronization is established.

    Abstract translation: 要解决的问题:提供一种适用于扩大频率牵引范围并同时防止接收特性降低的解调器电路,而不会扩大电路规模。解决方案:根据实施例,解调器电路安装在 具有用于预处理数字调制的接收信号的预处理单元的通信设备,用于将预处理的接收信号转换为数字量以产生数字信号的模拟/数字转换器,以及用于产生用于产生数字信号的振荡器的控制电压的环路滤波器 时钟信号。 解调器电路设置有用于将数字信号转换为基带信号的转换单元,检测单元和脉冲宽度可变单元。 检测单元检测基带信号的符号反转,并且向环路滤波器输出表示基于符号反转定时从基带信号提取的时钟分量与时钟信号之间的相位误差的相位误差信息脉冲。 当尚未建立载波同步时,脉冲宽度可变单元改变相位误差信息脉冲的脉冲宽度,使其比载波同步建立后的相位误差信息脉冲的脉冲宽度更宽。

    Demodulator
    23.
    发明专利
    Demodulator 审中-公开
    解调器

    公开(公告)号:JP2011109472A

    公开(公告)日:2011-06-02

    申请号:JP2009263202

    申请日:2009-11-18

    Inventor: FUJII YASUYUKI

    Abstract: PROBLEM TO BE SOLVED: To provide a demodulator for correctly shaping a waveform even if a deviation in frequency is caused in an input signal. SOLUTION: A digital demodulator 20 includes multipliers 21, 22 each as a baseband converter for converting a received signal into a baseband signal, a route roll-off filter 24 for shaping the waveform of the baseband signal, a carrier removing circuit 26 for removing a carrier component from the baseband signal, and a PLL circuit 31 for detecting a component having fast time response and a component having slow time response from the baseband signal from which the carrier frequency is removed. The component having slow time response is fed back to an NCO circuit 33, the NCO circuit 33 oscillates a signal for driving the baseband conversion section on the basis of the component having slow time response. The component having fast time response is fed back to an NCO circuit 32, and the NCO circuit 32 oscillates a signal for driving the carrier removing circuit 26 on the basis of the component having fast time response. COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:即使在输入信号中引起频率偏差,也提供用于正确整形波形的解调器。 解决方案:数字解调器20包括作为用于将接收信号转换为基带信号的基带转换器的乘法器21,22,用于整形基带信号的波形的路由滚降滤波器24,载波去除电路26 用于从基带信号中去除载波分量;以及PLL电路31,用于检测具有快速时间响应的分量,以及从载波频率被去除的基带信号中具有慢时间响应的分量。 具有缓慢时间响应的分量被反馈到NCO电路33,NCO电路33基于具有缓慢的时间响应的分量来振荡用于驱动基带转换部分的信号。 具有快速时间响应的部件被反馈到NCO电路32,并且NCO电路32基于具有快速时间响应的部件振荡用于驱动载波去除电路26的信号。 版权所有(C)2011,JPO&INPIT

    Modulating device and demodulating device
    24.
    发明专利
    Modulating device and demodulating device 审中-公开
    调制装置和解调装置

    公开(公告)号:JP2011061719A

    公开(公告)日:2011-03-24

    申请号:JP2009212185

    申请日:2009-09-14

    Inventor: FUJII YASUYUKI

    Abstract: PROBLEM TO BE SOLVED: To provide a modulating device and a demodulating device that are simple in configuration and can process a plurality of transmission signals each having a different transmission band, modulation system, and transmission capacity.
    SOLUTION: A modulating device includes: a rate converter 101 converting a first transmission bit string transmitted with a first frequency span and a second transmission bit string transmitted with a second frequency span, which is one half of the first frequency span, into a reference transmission rate; a symbol mapping part 105 performing a first symbol conversion converting the first transmission bit string into a first symbol string using a first modulation system and a second symbol conversion converting the second transmission bit string into a second symbol string using a second modulation system different from the first modulation system; and a unique word adding part 106 adding a redundant bit to each of the first and the second symbol strings so that a symbol clock for the second symbol string is one half with respect to a symbol clock for the first symbol string, and generates a radio signal using an oscillation signal generated from a common oscillator 111.
    COPYRIGHT: (C)2011,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种调制装置和解调装置,其配置简单并且可以处理各自具有不同传输频带,调制系统和传输容量的多个传输信号。 调制装置包括:速率转换器101,将以第一频率跨度发送的第一传输比特串和以第一频率跨度的一半的第二频率跨度发送的第二传输比特串转换成 参考传输速率; 符号映射部105执行使用第一调制系统将第一发送位串转换为第一符号串的第一符号转换,以及使用与第二符号转换不同的第二调制系统将第二发送位串转换为第二符号串的第二符号转换 第一调制系统; 以及唯一字添加部分106,其将第一和第二符号串中的每一个添加冗余位,使得第二符号串的符号时钟相对于第一符号串的符号时钟为一半,并且生成无线电 信号,使用从公共振荡器111产生的振荡信号。版权所有:(C)2011,JPO&INPIT

    Digital broadcasting relay device and transmission method
    25.
    发明专利
    Digital broadcasting relay device and transmission method 审中-公开
    数字广播继电器和传输方法

    公开(公告)号:JP2009049664A

    公开(公告)日:2009-03-05

    申请号:JP2007213156

    申请日:2007-08-17

    Abstract: PROBLEM TO BE SOLVED: To provide a digital broadcasting relay device and a transmission method for relaying and transmitting broadcasting signals to a plurality of transmission stations while reducing a device structure, suppressing the influences of interference and saving frequency resources.
    SOLUTION: A transmitter TA inputs a second local signal via a divider 51 and an IF signal obtained by converting OFDM modulated waves into intermediate frequencies with a mixer 1A, via a divider 52 to a mixer 2B of a transmitter Tb, and outputs the IF signal converted into transmission frequencies with the second local signal, to a PA 30 of the transmitter Tb. Thus, uniform electric waves which have no difference in frequency and phase change from transmitted waves transmitted from the PA 30 of the transmitter Ta are transmitted, whereby OFDM signals can be received and demodulated on a reception side while securing required MER while keeping a D/U ratio low even when the transmitted waves from the transmitters Ta, Tb interfere with each other.
    COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种数字广播中继装置和用于在减少装置结构的同时向多个发送站发送广播信号的发送方法,抑制干扰的影响并节省频率资源。 解决方案:发射机TA经由除法器51输入第二本地信号,以及通过经由分频器将OFDM调制波转换成中频的IF信号到发射机Tb的混频器2B,并输出 IF信号被转换成具有第二本地信号的发送频率,发送到发射机Tb的PA 30。 因此,发送从发送机Ta的PA 30发送的发送波的频率和相位变化没有差异的均匀电波,从而可以在接收侧接收和解调OFDM信号,同时保持所需的MER,同时保持D / 即使来自发射机Ta,Tb的发射波彼此干扰,U比也低。 版权所有(C)2009,JPO&INPIT

    Digital modulated-wave demodulator
    26.
    发明专利
    Digital modulated-wave demodulator 审中-公开
    数字调制波解调器

    公开(公告)号:JP2008236320A

    公开(公告)日:2008-10-02

    申请号:JP2007072364

    申请日:2007-03-20

    Inventor: FUJII YASUYUKI

    Abstract: PROBLEM TO BE SOLVED: To provide a digital modulated-wave demodulator for pulling a carrier in a wider range. SOLUTION: Frequency Words given to an NCO 23 are changed over at every fixed-time intervals when carrier waves are asynchronous. Accordingly, since the oscillation frequency of the NCO 23 is varied by a constant width from a central value, the apparent wide variable width of regenerative carrier waves can be obtained. Consequently, the pull-in range of carrier waves can be expanded even in a low speed device. COPYRIGHT: (C)2009,JPO&INPIT

    Abstract translation: 要解决的问题:提供用于在更宽范围内拉动载波的数字调制波解调器。 解决方案:当载波是异步的时,给予NCO23的频率字每隔固定时间间隔改变。 因此,由于NCO 23的振荡频率从中心值变化恒定的宽度,所以可以获得再生载波的表观宽可变宽度。 因此,即使在低速装置中也能扩大载波的拉入范围。 版权所有(C)2009,JPO&INPIT

    Digital radio receiver, demodulation circuit, and its demodulation method
    27.
    发明专利
    Digital radio receiver, demodulation circuit, and its demodulation method 审中-公开
    数字无线电接收机,解调电路及其解调方法

    公开(公告)号:JP2006229765A

    公开(公告)日:2006-08-31

    申请号:JP2005042957

    申请日:2005-02-18

    Inventor: FUJII YASUYUKI

    Abstract: PROBLEM TO BE SOLVED: To provide a digital radio receiver, a demodulation circuit, and its demodulation method which are prevented from being affected by interference waves of adjoining channels, and carry out AGC in which a desired wave can be normally demodulated.
    SOLUTION: The demodulation circuit D of the digital radio receiver carries out processing to properly demodulate the signal without being affected by interference waves, by performing the AGC in two steps of a level detector 9 and an IFAGC amplifier 3 in order to keep an input of A/D4 constant, and a level detector 7 and a BBAGC amplifier in order to keep output of a demodulation base band signal constant.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种数字无线电接收机,解调电路及其解调方法,其被阻止受到相邻信道的干扰波的影响,并且执行可以正常解调期望波的AGC。 解决方案:数字无线电接收机的解调电路D通过在电平检测器9和IFAGC放大器3的两个步骤中执行AGC来进行适当地解调信号而不受干扰波的影响的处理,以便保持 A / D4常数的输入,电平检测器7和BBAGC放大器,以便保持解调基带信号的输出不变。 版权所有(C)2006,JPO&NCIPI

    ADAPTIVE EQUALIZER, RECEIVER AND TAP COEFFICIENT CALCULATION METHOD

    公开(公告)号:JP2002280941A

    公开(公告)日:2002-09-27

    申请号:JP2001078290

    申请日:2001-03-19

    Abstract: PROBLEM TO BE SOLVED: To enhance reception performance by enhancing the equalization performance of a received signal waveform in a multilevel QAM modulation system, without requiring a specific reference signal sequence. SOLUTION: The transversal filter type adaptive equalizers 106-1, 106-2 provided to a receiver receiving a modulation signal, adopting the multilevel QAM modulation system use the CMA(constant modulus algorithm) to calculate a tap coefficient. An evaluation function used in this case is switched alternately to J12 or Jt for each iteration. An error ε, calculated by the evaluation function, is compared with a specified value δ and when the error ε is smaller than the value δ, and the least mean-square error algorithm is selected for the calculation algorithm of the tap coefficient from the CMA. In the least mean-square error algorithm, a bit sequence corresponding to a convergence point closest to the signal point of an equalization signal outputted from the adaptive equalizers 106-1, 106-2 is used for the reference signal sequence.

    RECEIVER AND QUADRATURE AMPLITUDE DEMODULATION CIRCUIT THEREOF

    公开(公告)号:JP2001345871A

    公开(公告)日:2001-12-14

    申请号:JP2000162084

    申请日:2000-05-31

    Abstract: PROBLEM TO BE SOLVED: To improve communication quality by keeping orthogonality between channels with high accuracy, regardless of the number of signal points. SOLUTION: Mutual deviations of Q and I axes are detected based on logic operation using a main signal after digital conversion and an error signal corresponding to a modulation system, and a control signal is generated for correcting this deviation. However, in this case, only 8×8 points positioned on the center of a signal point location drawing are used for generating the control signal. More specifically, low-order one bit and two bits (Q6, I6, Q5 and I5) of the main signal are used, and when a point positioned outside rather than the range appears, the immediately preceding signal is held by latching the orthogonality control signal.

    DIGITAL MICROWAVE RADIO COMMUNICATION EQUIPMENT AND ITS CARRIER WAVE SYNCHRONIZING CIRCUIT

    公开(公告)号:JPH11177647A

    公开(公告)日:1999-07-02

    申请号:JP34637697

    申请日:1997-12-16

    Abstract: PROBLEM TO BE SOLVED: To pull in synchronism at a proper position at all the time in spite of an external influence such as a temperature fluctuation even when a transmission clock frequency is low. SOLUTION: The sweep frequency range of a voltage controlled oscillator(VCO) is bisected and the sweeping directions of these respective bisected sweep frequency ranges can be inverted so that four ways of synchronizing point searches are made possible. Therefore, the frequency of a basic rectangular wave HS generated from a rectangular wave oscillating circuit 21 is divided into four stages by a frequency divider circuit 22 at a search circuit 20, afterwards, the wave is made into triangular wave by a rectangular wave/triangular wave converting circuit 23 and based on the basic rectangular wave HS, four signals SR1-SR4 are generated by a shift register 24 so as to be made active while delaying their phases for each cycle. Corresponding to how many times pseudo synchronism pull-in counted by a two-bit counter 25 occurs, one of these signals is selectively outputted and the conduction of a switch 27 is controlled so that the triangular wave can be partially outputted as a search voltage.

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