Resistive random access memory and manufacturing method thereof

    公开(公告)号:US10804465B2

    公开(公告)日:2020-10-13

    申请号:US16123234

    申请日:2018-09-06

    Abstract: A resistive random access memory and a manufacture method thereof are provided. The resistive random access memory includes: a first electrode, a second electrode, a resistive layer between the first electrode and the second electrode, and at least one thermal enhanced layer; the thermal enhanced layer is adjacent to the resistive layer, and a thermal conductivity of the thermal enhanced layer is less than a thermal conductivity of the first electrode and a thermal conductivity of the second electrode.

    GENERATIVE ADVERSARIAL NETWORK DEVICE AND TRAINING METHOD THEREOF

    公开(公告)号:US20200175379A1

    公开(公告)日:2020-06-04

    申请号:US16699727

    申请日:2019-12-01

    Abstract: A generative adversarial network device and a training method thereof. The generative adversarial network device includes a generator and a discriminator. The generator is configured to generate a first sample according to an input data; the discriminator is coupled to the generator, and is configured to receive the first sample and be trained based on the first sample; the generator includes a first memristor array serving as a first weight array. The generative adversarial network device can omit a process of adding noise to fake samples generated by the generator, thereby saving training time, reducing resource consumption and improving training speed of the generative adversarial network.

    Operation Method of Resistive Random Access Memory and Resistive Random Access Memory Device

    公开(公告)号:US20180330788A1

    公开(公告)日:2018-11-15

    申请号:US15776520

    申请日:2016-12-22

    Abstract: An operation method of a resistance random access memory and a resistance random access memory apparatus are provided. The method includes: applying an initial reset voltage to a storage unit; carrying out a read check operation to acquire a resistance value of the storage unit; judging whether the resistance value of the storage unit reaches a preset target resistance value in a high resistance state; if the resistance value of the storage unit is less than the preset target resistance value in the high resistance state, applying a set voltage to the storage unit to set the storage unit to a preset target resistance value in a low resistance state, then applying a reset voltage of which an amount is increased to the storage unit, and repeating the read check operation and the subsequent steps until the storage unit reaches the preset target resistance value in the high resistance state.

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