公开(公告)号：EP1568192B1

公开(公告)日：2009-04-15

申请号：EP03783365.4

申请日：2003-11-14

Applicant: INTERDIGITAL TECHNOLOGY CORPORATION

Inventor： OZLUTURK, Fatih ,  KAZAKEVICH, Leonid ,  HAQUE, Tanbir ,  DEMIR, Alpaslan ,  NARAYAN, Geetha, Lakshmi ,  KEARNEY, Kenneth

IPC: H03D3/00 ,  H03C3/40 ,  H03G3/00

CPC classification number: H03G3/001 ,  H03D3/008 ,  H03D3/009 ,  H03G3/3068 ,  H03G3/3089 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/302 ,  H03G2201/307 ,  H03G2201/508 ,  H04B1/30 ,  H04L2027/0016 ,  H04L2027/0024

Abstract: In order to compensate for performance degradation caused by inferior low-cost analog radio component (105) tolerances of an analog radio (100), a future system architecture (FSA) wireless communication transceiver employs numerous digital signal processing techniques to compensate for deficiencies of such analog components so that modern specifications may be relaxed. Automatic gain control (110) functions are provided in the digital domain, so as to provide enhanced phase and amplitude compensation, as well as many other radio frequency parameters.

公开(公告)号：EP1542358A1

公开(公告)日：2005-06-15

申请号：EP04029197.3

申请日：2004-12-09

Applicant: NEC CORPORATION

Inventor： Terao, Kenji

IPC: H03G3/30

CPC classification number: H03G3/3078 ,  H03G3/3068 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/302 ,  H03G2201/307

Abstract: In a slot format of a received signal, AGC gain update timings (t1 to t4) are shifted every time to disperse and reduce an influence of a noise attributable to a direct current component specific to direct conversion which is accompanied by AGC gain update. In particular, in the case where each of slots in the received signal includes an information portion (data) having a larger code correcting capability and an information portion having a smaller code correcting capability (TPC (transmission power control), TFCI (transport format combination indicator), PILOT), the AGC gain update timing is generated while being shifted in the former information portion, thereby reduce the influence of the noise. When the amount of shift of the AGC gain update timing is set to be larger than that of one symbol of the received signal, the influence of the noise accompanied by the AGC gain update is further reduced.

Abstract translation: 在接收信号的时隙格式，AGC增益更新定时（T1到T4）被移位每分散和减少的噪声的影响时间属性能够专用于直接变换的所有直流分量这伴随着AGC增益更新。 特别是，在其中每个在接收信号的时隙包括在具有较大码校正能力和在具有较小的代码校正能力信息部分（TPC（发送功率控制）信息部分（数据）的情况下，TFCI（传输格式组合 指示器），PILOT），则同时在部分前信息被移动产生的AGC增益的更新定时，由此降低噪声的影响。 当AGC增益更新定时的偏移量被设定为比接收信号的一个符号的宽度，由AGC增益更新伴随的噪声的影响进一步减小。

公开(公告)号：US09859857B2

公开(公告)日：2018-01-02

申请号：US15488365

申请日：2017-04-14

Applicant: FCI Inc.

Inventor： SeongHun Jeong

IPC: H04B1/06 ,  H03F3/45 ,  H03G3/30 ,  H03F3/189

CPC classification number: H03G3/3052 ,  H03F3/19 ,  H03F3/45475 ,  H03F3/45973 ,  H03F2200/294 ,  H03F2203/45521 ,  H03G3/001 ,  H03G3/3068 ,  H03G2201/202 ,  H03G2201/40

Abstract: Disclosed herein is a DC offset cancellation circuit. The DC offset cancellation circuit includes a DC feedback unit configured to vary a DC feedback (DCFB) bandwidth to add at least one mid-bandwidth to the DCFB bandwidth and to provide a delay time in each case in order to reduce the DC droop error that occurs in switching from the high bandwidth (BW) to the mid-BW or from the mid-BW mode to the low BW mode, such that stable settling is ensured.

公开(公告)号：US20170310350A1

公开(公告)日：2017-10-26

申请号：US15644578

申请日：2017-07-07

Applicant: SOCIONEXT INC.

Inventor： Koichiro TANAKA ,  Takeaki WATANABE

IPC: H04B1/16 ,  H03F3/19 ,  H03G3/30

CPC classification number: H04B1/16 ,  H03F3/19 ,  H03F2200/294 ,  H03F2200/451 ,  H03G3/3036 ,  H03G3/3052 ,  H03G3/3078 ,  H03G2201/202 ,  H04B1/30

Abstract: An AGC circuit for a radio receiver includes a detector converting a high frequency signal into a baseband signal. To reduce generation of a DC offset, the AGC circuit includes: a variable gain amplifier having an amplifier circuit and a high-pass filter, the amplifier circuit amplifying the baseband signal with a variable gain and the high-pass filter coupled to the amplifier circuit and having a cut-off frequency which is variable; a controller supplying a gain control signal; and a blocker temporarily blocking the high frequency signal. Using the block control signal, the controller causes the blocker to start blocking the high frequency signal, before the cut-off frequency of the high-pass filter is switched from high to low.

公开(公告)号：US20140162581A1

公开(公告)日：2014-06-12

申请号：US13924760

申请日：2013-06-24

Applicant: Starkey Laboratories, Inc.

Inventor： Jeffrey Paul Solum

IPC: H04B1/10

CPC classification number: H04B1/1027 ,  H03G3/3052 ,  H03G2201/202 ,  H03G2201/206 ,  H04B1/109 ,  H04L27/3809

Abstract: One embodiment of the present subject matter includes a method of receiving an input signal. The method, in various embodiments, includes detecting a peak of the input signal and detecting an envelope of the input signal. In various embodiments, the peak and envelope are used to identify out-of-band blocking signals and to adjust gain control. The method also includes comparing the peak to a first threshold Tp and comparing the envelope to a second threshold Te. In the method, if the peak is above the first threshold and the envelope is below the second threshold, then ignoring the input signal. If the envelope is above the second threshold, the method includes applying automatic gain control to decode information encoded in the input signal.

Abstract translation: 本主题的一个实施例包括接收输入信号的方法。 在各种实施例中，该方法包括检测输入信号的峰值并检测输入信号的包络。 在各种实施例中，峰值和包络用于识别带外阻塞信号并调整增益控制。 该方法还包括将峰值与第一阈值Tp进行比较并将包络与第二阈值Te进行比较。 在该方法中，如果峰值高于第一阈值并且包络低于第二阈值，则忽略输入信号。 如果信封高于第二阈值，则该方法包括应用自动增益控制来对输入信号中编码的信息进行解码。

公开(公告)号：US20060274620A1

公开(公告)日：2006-12-07

申请号：US10908992

申请日：2005-06-03

Applicant: Bassel Haddad

Inventor： Bassel Haddad

IPC: G11B7/00

CPC classification number: H03G3/001 ,  H03G3/3052 ,  H03G2201/202

Abstract: An automatic gain control (AGC) controls the signal amplitude at the input to an analog to digital converter (ADC) input by applying a gain that produces a desired overall amplitude resolution of the patterns actually presented by the signal delivered by the ADC converter. Short RLL patterns will have sufficient resolution for reliable extraction as a result of having sufficient overall amplitude, which thereby strengthens the ability of the read channel to correctly extract data. Moreover, the system determines correct AGC settings responsive to measurements of user data parameters. The system also detects and corrects for DC offsets in the signal whose gain is controlled.

Abstract translation: 自动增益控制（AGC）通过施加增益来控制模数转换器（ADC）输入端的信号幅度，该增益产生由ADC转换器传送的信号实际呈现的模式的所需总体幅度分辨率。 由于具有足够的总体幅度，短的RLL图案将具有足够的分辨率以进行可靠的提取，从而增强读取通道正确提取数据的能力。 此外，系统根据用户数据参数的测量来确定正确的AGC设置。 该系统还检测和校正增益受控的信号中的直流偏移。

公开(公告)号：US06792282B1

公开(公告)日：2004-09-14

申请号：US09666698

申请日：2000-09-21

Applicant: William J. Domino ,  Dmitriy Rozenblit ,  Morten Damgaard ,  Nooshin D. Vakilian

Inventor： William J. Domino ,  Dmitriy Rozenblit ,  Morten Damgaard ,  Nooshin D. Vakilian

IPC: H04B102

CPC classification number: H03G3/3047 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/206 ,  H03G2201/307

Abstract: A translation loop modulator and power amplifier in a phase and amplitude modulated transmission environment includes a translation loop having a phase locked loop and that is configured to receive a first modulated signal (PM) and that is also configured to provide a frequency specific modulated signal. The invention also includes a power amplifier configured to receive the frequency specific modulated signal, a variable gain element configured to provide a second modulated signal (AM) to the power amplifier and a switching element configured to receive a portion of an output of the translation loop and a portion of an output power of the power amplifier. The switching element is configured to apply the output portion of the translation loop to an input of the translation loop during a first time period and apply the detected output power portion of the power amplifier to the input of the translation loop during a second time period, thus allowing the phase locked loop in the translation loop to correct for any phase shift caused by the power amplifier.

Abstract translation: 在相位和幅度调制传输环境中的平移环路调制器和功率放大器包括具有锁相环的平移环路，并且被配置为接收第一调制信号（PM），并且还被配置为提供频率特定调制信号。 本发明还包括被配置为接收频率特定调制信号的功率放大器，被配置为向功率放大器提供第二调制信号（AM）的可变增益元件和被配置为接收转换回路的输出的一部分的开关元件 和功率放大器的输出功率的一部分。 开关元件被配置为在第一时间段期间将平移环路的输出部分施加到平移环路的输入端，并且在第二时间周期期间将功率放大器的检测输出功率部分施加到平移环路的输入端， 从而允许平移环路中的锁相环校正由功率放大器引起的任何相移。

公开(公告)号：JP2005175731A

公开(公告)日：2005-06-30

申请号：JP2003411131

申请日：2003-12-10

Applicant: Nec Corp ,  日本電気株式会社

Inventor： TERAO KENJI

IPC: H03G3/20 ,  H03G3/30 ,  H04B1/16 ,  H04B1/30 ,  H04B1/707 ,  H04B1/7097

CPC classification number: H03G3/3078 ,  H03G3/3068 ,  H03G2201/103 ,  H03G2201/202 ,  H03G2201/302 ,  H03G2201/307

Abstract: PROBLEM TO BE SOLVED: To lessen the influence of DC noise due to the AGC gain update in a direct conversion receiver.
SOLUTION: As shown with AGC gain update timings t1-t4, etc. in the slot structure of received signals, the timing is shifted every time to disperse and lessen the influence of the DC noise peculiar to the direct conversion accompanying with the AGC gain update. If, especially, the slots of received signals have information (Data) with a high code correcting power and information (TPC, TFCI, PILOT) with a low code correcting power, the AGC gain update timing is shifted in the former information part to generate it, thereby more lessening the influence of the noise. The shift width of the AGC gain update timing is set to be greater than one symbol width of the received signal, thereby further lessening the influence of the noise due to the AGC gain update.
COPYRIGHT: (C)2005,JPO&NCIPI

Abstract translation: 要解决的问题：减少直接转换接收机中AGC增益更新引起的直流噪声的影响。 解决方案：如接收信号的时隙结构中的AGC增益更新定时t1-t4所示，定时每次移位以分散并减轻伴随着直接转换的直接转换所特有的直流噪声的影响 AGC增益更新。 如果特别是接收到的信号的时隙具有高码校正功能的信息（Data）和具有低码校正功率的信息（TPC，TFCI，PILOT），那么在前一个信息部分中将AGC增益更新定时移位以产生 从而更能减轻噪音的影响。 AGC增益更新定时的移位宽度被设置为大于接收信号的一个符号宽度，从而进一步减小由于AGC增益更新引起的噪声的影响。 版权所有（C）2005，JPO＆NCIPI

公开(公告)号：JP2008543232A

公开(公告)日：2008-11-27

申请号：JP2008514844

申请日：2006-06-01

Applicant: ゾラン コーポレイション

Inventor： ハダッド，バッセル

IPC: H04N5/93 ,  H04N5/85

CPC classification number: H03G3/001 ,  H03G3/3052 ,  H03G2201/202

Abstract: 自動利得制御（ＡＧＣ）は、アナログ・デジタルコンバータ（ＡＤＣ）により配信される信号により実際に呈示されるパターンの所望の全振幅分解能を生成する利得を適用することにより、ＡＤＣ入力への入力における信号振幅を制御する。 短いＲＬＬパターンは十分な全振幅を有する結果として信頼し得る抽出に十分な分解能を有することになり、これにより正しくデータを抽出する読み出しチャネルの能力を強化する。 また、システムはユーザデータパラメータの測定に応じて正しいＡＧＣ設定を決定する。 システム０はまた、利得が制御された信号においてＤＣオフセットを検出して補正する。

公开(公告)号：US08472573B2

公开(公告)日：2013-06-25

申请号：US13193255

申请日：2011-07-28

Applicant: Jeffrey Paul Solum

Inventor： Jeffrey Paul Solum

IPC: H04L27/08

CPC classification number: H04B1/1027 ,  H03G3/3052 ,  H03G2201/202 ,  H03G2201/206 ,  H04B1/109 ,  H04L27/3809

Abstract: One embodiment of the present subject matter includes a method of receiving an input signal. The method, in various embodiments, includes detecting a peak of the input signal and detecting an envelope of the input signal. In various embodiments, the peak and envelope are used to identify out-of-band blocking signals and to adjust gain control. The method also includes comparing the peak to a first threshold Tp and comparing the envelope to a second threshold Te. In the method, if the peak is above the first threshold and the envelope is below the second threshold, then ignoring the input signal. If the envelope is above the second threshold, the method includes applying automatic gain control to decode information encoded in the input signal.