公开(公告)号：EP0086566A3

公开(公告)日：1985-07-10

申请号：EP83300264

申请日：1983-01-19

Applicant: SONY CORPORATION

Inventor： Furuya, Tsuneo c/o Patent Division ,  Fukami, Tadashi c/o Patent Division

IPC: G11B05/09 ,  H04L01/10 ,  G06F11/10

CPC classification number: G11B20/1809 ,  G11B20/1833

Abstract: In an apparatus for error correction in which data sequences containing blocks each formed of plural data words previously arranged on a time-base and check words are written in a data memory (37) on the basis of a write address generator (38), the data sequences are then read out from the data memory (37) on the basis of a read address generator (39) so as to generate rearranged data sequences and, during writing and reading of the data sequences, error correction is carried out, there is included an error correction arithmetic circuit (50) for performing an error correction calculation, a pointer addition circuit (51, 52) for adding a pointer to the data words in association with an error state of the blocks, and a program memory (49) for memorizing a microprogramm with fields to control the error correction arithmetic circuit (50) and pointer addition circuit (51, 52).

公开(公告)号：EP0053655A3

公开(公告)日：1983-02-02

申请号：EP81106701

申请日：1981-08-28

Applicant: International Business Machines Corporation

Inventor： Rohen, James Emery

IPC: G06K07/016 ,  G11B05/09

CPC classification number: G06K7/016

Abstract: The velocity of a magnetic record card (12) is derived by recording a magnetic transition in a flux field in a stripe (16) with a write head (17). The transition is later sensed, as the card is moved past the head, by an inductive read head (24) and a side-by-side magneto-resistive read head (26). The difference in outputs of the read heads is combined in a computation circuit (21) to give a voltage which is indicative of velocity on line (38) to a voltage controlled oscillator (20). The oscillator (20) operates a flip-flop (40) alternately to provide time base signals on line (41) to write head driver (44) and on line (42) to gate binary data from a register (45) to the write head driver (44).

公开(公告)号：EP0129236A3

公开(公告)日：1988-01-07

申请号：EP84106953

申请日：1984-06-18

Applicant: HITACHI, LTD.

Inventor： Kobayashi, Masaharu Hitachi-Hachimanyama ,  Arai, Takao ,  Noda, Tsutomu

IPC: H04B12/02 ,  G11B05/09 ,  H03K13/01

CPC classification number: G11B20/10527 ,  H03M1/1019 ,  H03M1/504 ,  H04B14/04

Abstract: A signal conversion apparatus for use in a PCM signal processing system in which a series of multi-bit digital signals is produced through sampling and quantization of a multi-channel analog signal. The series of multi-bit digital signals (e.q., 109) includes groups of multi-bit digital signals (e.g., 107, 108) being representative of respective analog signal portions (3, 4) constituting the multi-channel analog signal. The apparatus comprises a translating section (e.g., 121) for producing substitutional multi-bit digital signals (122) from at least one (107) of the groups of digitals corresponding to at least one analog signal portion (3), which substitutional digital signals represent amplitudes of the one analog signal portion at sampling points different from those at which the one analog signal was sampled to provide the one group of digital signals The substitutional digital signals are substituted, in the translating section, forthe one group of the digital signals to produce a corresponding group of sampling point- shifted multi-bit digital signals (122) The resulting PCM multi-bit digital signals (109) are acceptable by digital-to-analog conversion processor requiring PCM digital signals generated through sampling at shifted or different sampling points as compared with the above-mentioned series of digital signals

公开(公告)号：EP0122467A3

公开(公告)日：1987-11-25

申请号：EP84102799

申请日：1984-03-14

Applicant: KABUSHIKI KAISHA TOSHIBA

Inventor： Shimizu, Makoto

IPC: G11B27/10 ,  G11B07/00 ,  G06F15/40 ,  G11B05/09

CPC classification number: G06F17/30952 ,  G11B7/00 ,  G11B17/005 ,  G11B20/1217 ,  G11B27/19 ,  G11B2220/2508 ,  G11B2220/2537

Abstract: An image information registering/retrieving system comprises an optical disk (19) for registering image information and for registering retrieving data, a magnetic disk (28) for storing the retrieving data, and a control circuit (11, 20, 22, 23, 24, 25, 27) for controlling the registering and retrieving operations. When the magnetic disk 28 loses its function and is replaced by a new one, the retrieving data on the optical disk (19) is copied on the new magnetic disk.

公开(公告)号：EP0114690A3

公开(公告)日：1987-09-09

申请号：EP84100611

申请日：1984-01-20

Applicant: Siemens Aktiengesellschaft

Inventor： Gottwald, Winfried, Dipl.-Ing.

IPC: G11B05/008 ,  G11B05/012 ,  G11B05/09 ,  G11B15/44 ,  G11B19/26

CPC classification number: G11B5/00817 ,  G11B5/00878 ,  G11B5/012 ,  G11B20/10

公开(公告)号：EP0102533A3

公开(公告)日：1987-05-13

申请号：EP83107694

申请日：1983-08-04

Applicant: DISCOVISION ASSOCIATES

Inventor： George, David John ,  Nguyen, Hue Van ,  Yardy, Raymond

IPC: G11B07/00 ,  G11B05/09

CPC classification number: G11B20/1809

Abstract: A method and apparatus for encoding a plurality of bytes of digital data into a further plurality of bits suitable for storage in a storage medium, and for recovery therefrom, and for decoding the stored bits retrieved from the storage medium, for the recovery of the encoded bytes. The digital data bytes are arranged into a plurality of code blocks, each having a first predetermined number of columns and a second predetermined number of rows of bytes. A parity block of bytes of data is generated having a number of columns and a number of rows of bytes corresponding to the first predetermined number of columns and to the second predetermined number of rows of bytes, respectively, of the code blocks, the bits of data in the parity block corresponding to the computed parity of the combined corresponding bits in each of the code blocks. Secondly, a parity row of bytes of data are generated for each of the data blocks such that each bit in each byte in the parity row corresponds to the computed parity of the combined corresponding bits in each byte in the column of the associated data block of that parity row. Each such row of parity bytes is added to its associated block. Thirdly, a correction control word is generated for each 8 bit byte of data blocks, parity rows and parity blocks, and is added to its associated byte to form a composite word. The bits of data of all such composite words for all of the blocks are interleaved according to a matrix having a third predetermined number of rows and a fourth predetermined number of columns, and the interleaved data is provided in serial arrangement for storage.

公开(公告)号：EP0125922A3

公开(公告)日：1987-04-01

申请号：EP84303269

申请日：1984-05-15

Applicant: DATA GENERAL CORPORATION

Inventor： Gershenson, Edward ,  Lemone, Louis A. ,  Lippitt, Mark C.

IPC: G11B05/09 ,  G11B05/012 ,  G06F03/06

CPC classification number: G11B20/1426 ,  G11B5/012 ,  G11B20/12 ,  G11B27/3027 ,  G11B2220/20

Abstract: A SYNC Detected signal (1035) is normally provided by resetting a flip-flop (1237) when a synchronization code in a header or data preamble of a disc sector is detected by logic (1223). Flip-flop (1237) is initially forced set by a signal (1229 or 1231) indicating a header or data preamble should be present. Detection of the code pulls SYNC DET (1225) low to reset the flip-flop (1237) and thereby force SYNC Detected high. If the code is not detected when it should have been, a signal SET SYNC (651) is forced low to reset another flip-flop (1251) which puts SYNCW(12191) low and putsSYNC Detected (1035) high via an inverter (1221). Accordingly data will always be read from a header preamble but the header will not be read correctly and will not match the target header. Data will therefore not be read from or written to the sector.

公开(公告)号：EP0110367A3

公开(公告)日：1985-12-04

申请号：EP83111904

申请日：1983-11-28

Applicant: News Log International Inc.

Inventor： Jewer, Alan A.

IPC: G11B07/013 ,  G11B07/00 ,  G11B20/18 ,  G11B27/10 ,  G11B05/09 ,  G06F11/10

CPC classification number: G06K19/06075 ,  G06K19/06037 ,  G11B7/0033 ,  G11B7/013 ,  G11B20/12 ,  G11B20/1403 ,  G11B20/1833 ,  G11B27/3027

Abstract: The coded data (12) on the record carrier (10) and the method for encoding such data (12) in tracks (14) provide a relatively simple and yet very effective means for making the data record carrier (10), and particularly the data (12) recorded thereon, highly tolerant of errors such as "burst errors" where one or more spots of data on the data record carrier (10) are obliterated. The data (12) are recorded on the data record carrier (10) in arcuate nested tracks (14), each track (14) comprising a stream of data bits. The stream of data bits includes an encoded front track address (32) and encoded back track address (44) with coded groups or so-called Hamming type coded groups (52) of data bits therebetween each of which can comprise 96 or 105 data bits. Error correction is provided by including in the coded groups data words which include a data byte and a field of parity bits, typically an eight bit data byte followed by a four bit parity field. Also a cyclic redundancy checksum byte is provided in the group as a further check of the data therein. Further, this data is multiplexed. Additionally, one or two redundant groups are provided in each track (14) for recreating missing groups and a cyclic redundancy checksum field is provided for error detection in each track (14).

公开(公告)号：EP0092403A3

公开(公告)日：1985-05-15

申请号：EP83302149

申请日：1983-04-15

Applicant: SONY CORPORATION

Inventor： Fukuda, Shinichi c/o Patent Division ,  Odaka, Kentaro c/o Patent Division

IPC: G11B05/09 ,  H04N05/782

CPC classification number: G11B20/1813 ,  G11B20/1809

Abstract: For recording an analog signal by means of two recording heads (1A, 1B) equally spaced on a rotating drum (3), a magnetic tape (2) is wrapped around a guide drum (3) with an angular range of 90°, so that there are recording periods when a head (1A, 1B) is tracing the tape (2) and free periods when neither head (1 A, 1 B) is tracing the tape (2). The analog signal to be recorded is converted to pulse code modulated (PCM) signals having real time periods longer than the recording periods. The free periods, during which neither head (1 A, 1 B) is in contact with the recording medium (2), are used to add redundant data such as parity data and a cyclic redundancy check (CRC) code to the PCM signals. The composite signal, which represents a PCM signal having the parity data and CRC code added to it, is time-base compressed to a period substantially equal to the recording periods and is recorded on the recording medium (2) by one of the heads (1 A, 1 B) during its recording period. To reproduce the signal, the same head arrangement is used. The free periods are used for error correction and the error-corrected signal is time-base expanded to occupy the original or real time signal period and then reconverted into the corresponding analog signal.

公开(公告)号：EP0085578A3

公开(公告)日：1985-03-06

申请号：EP83300530

申请日：1983-02-02

Applicant: SONY CORPORATION

Inventor： Nakano, Kenji ,  Moriwaki, Hisayoshi ,  Morio, Minoru

IPC: G11B05/09 ,  H04N05/782

CPC classification number: H04N5/928 ,  G11B5/0086 ,  G11B5/00878 ,  G11B20/10527

Abstract: Apparatus for recording an information signal comprising at least an analog audio signal in a plurality of successive tracks (2A, 2B) on a magnetic tape (2) includes a PCM processing circuit (22) for converting an analog audio signal into a PCM audio signal, a video signal processing circuit (13, 14, 19) for processing a video signal to produce an output video signal, a rotary magnetic head assembly (1A, 1B) for recording the output video signal and the PCM audio signal in the plurality of successive tracks (2A, 2B) on the tape (2), a switch assembly (17A, 17B) for supplying the output video signal and the PCM audio signal to the rotary magnetic head assembly (1A, 1B), and a control circuit (34, etc) for controlling the switch assembly (17A, 17B) to supply the output video signal and the PCM audio signal to the rotary magnetic head assembly (1A, 1B) during a video use mode so that the rotary magnetic head assembly (1A, 1B) records the output video signal in a main section of each track (2A, 2B) and to supply only the PCM audio signal to the rotary magnetic head assembly (1A, 1B) during an audio use mode so that the rotary magnetic head assembly (1A, 1 B) records the PCM audio signal in different segments of the main section and overscan section of each track (2A, 2B).