公开(公告)号：EP1194852B1

公开(公告)日：2005-08-24

申请号：EP00944952.1

申请日：2000-06-28

Applicant: EMC CORPORATION

Inventor： LINNELL, Thomas, Earl ,  TUCCIO, William, R. ,  MULVEY, Christopher, J.

IPC: G06F11/20 ,  H04L12/437

CPC classification number: G06F11/2094 ,  G06F11/2005 ,  G06F11/201 ,  H04L12/437

Abstract: A data storage system having a plurality of disk drives. Each one has a pair of ports. A pair of directors controls the flow of data to and from the disk drives. A first and second fibre channel port by-pass selector section are provided. The first fibre channel selector section includes: an input/output port coupled to a first one of the directors; and, a plurality of output/input ports connected between a first one of the ports of the plurality of desk drives through a first plurality of fibre channel links. The first fibre channel port by-pass selector section is adapted to couple the first one of the directors serially to one, or ones, of the first ports of the plurality of disk drives through a first fibre channel selectively in accordance with a control signal fed to the first fibre channel by-pass selector section. The first fibre channel includes one, or more, of the first plurality of fibre channel links. The second fibre channel port by-pass selector section is similarly configured.

Abstract translation: 一种具有多个磁盘驱动器的数据存储系统。 每一个都有一对端口。 一对导向器控制数据流入和流出磁盘驱动器。 提供了第一和第二光纤通道端口旁通选择器部分。 第一光纤信道选择器部分包括：耦合到第一个控制器的输入/输出端口; 以及通过第一多个光纤通道链路连接在多个桌面驱动器的第一个端口之间的多个输出/输入端口。 第一光纤通道端口旁通选择器部分适于通过第一光纤通道选择性地根据馈送的控制信号将第一指导者串联耦合到多个磁盘驱动器中的一个或多个第一端口 到第一个光纤通道旁路选择器部分。 第一光纤信道包括一个或多个第一多个光纤信道链路。 第二光纤通道端口旁路选择器部分被类似地配置。

公开(公告)号：EP1311951A1

公开(公告)日：2003-05-21

申请号：EP01935365.5

申请日：2001-05-11

Applicant: Bull HN Information Systems Inc.

Inventor： CARTEAU, Daniel

IPC: G06F12/00

CPC classification number: G06F11/2092 ,  G06F11/201 ,  G06F2201/85

Abstract: A data processing system with a RAID cache disk subsystem utilizes three RAID cache disk controllers to provide increased performance along with increased reliability, especially in the event of a failure of one of the disk controllers. Disk writes are mirrored in two disk controllers in order to guarantee integrity in the event of a disk controller or interface failure. Typically this write caching must be terminated when one of the controllers fails in order to maintain integrity. In the present invention, write caching continues utilizing the two remaining disk controllers.

公开(公告)号：EP1311939A2

公开(公告)日：2003-05-21

申请号：EP01944682.2

申请日：2001-06-11

Applicant: Quad Research

Inventor： DELLACONA, Richard

IPC: G06F3/06

CPC classification number: G06F3/0613 ,  G06F3/0635 ,  G06F3/0689 ,  G06F11/2007 ,  G06F11/201

Abstract: A high speed, microcomputer based, Fibre Channel compatible and fault tolerant information processing and mass storage system especially suited for information servers and application servers. A unique and extremely versatile system architecture, including a dual loop arbitrated, Fibre Channel capable, multiple-fault tolerant, hot-swappable mass storage disk array, permits combinations of servers and mass storage arrays which can be tailored for a wide variety of applications and which can be configured with emphasis on the system characteristics such as redundancy, speed, processing capability, storage capability, and the like, as desired. A unique backplane and/or midplane arrangement for connecting the system components allows for easy and, in most cases, on-line field upgrading and/or service and at the same time provides for the very efficient cooling of components, particularly those such as disk drives which tend to produce a lot of heat.

公开(公告)号：EP0632379A3

公开(公告)日：2001-10-10

申请号：EP94108649.8

申请日：1994-06-06

Applicant: Compaq Computer Corporation

Inventor： Sicola, Stephen J. ,  Jackson, James P. ,  Oakey, Roger L. ,  Brame, Richard G. ,  Mclean, Ronald H. ,  Walker, Michael D. ,  Fava, Thomas F. ,  Adams, Thomas Gene

IPC: G06F11/16 ,  G06F11/20

CPC classification number: G06F11/2089 ,  G06F11/1008 ,  G06F11/1662 ,  G06F11/201 ,  G06F11/2097

Abstract: A fault tolerant storage controller utilizing tightly coupled dual controller modules. The controller modules each check to see if another controller module or cache module is present and, if so, then all configuration information with respect to the controller modules and attached devices are shared between them. Configuration information may be entered into either or both of the controller modules and the information is shared dynamically. Each cache module may be "locked" by an individual controller module to prevent the other controller module from inadvertently disturbing the contents of the other controller module's cache. During initialization, each controller module checks for the existence of an associated cache module and, if present, it is immediately "locked" by the controller module. Should a controller module fail or give an indication of a malfunction, the other controller module will disable or "kill" the malfunctioning controller module thereby resetting it and releasing any lock it may have had on its cache module. In those instances where the cache module is a write cache, the surviving controller module can resume operations where the malfunctioning controller module left off and complete any remaining writes to the disabled controller module's storage devices preventing the loss of any host computer data. The controller modules are tolerant of the other controller module failing and then rebooting and the sequence of events is detected and recognized by the surviving controller module such that it does not disable the one that failed. The dual controller modules communicate asynchronously to verify that they are each operational and to exchange and verify configuration information and to provide operational status dynamically.

公开(公告)号：EP0843851B1

公开(公告)日：2001-05-16

申请号：EP96925880.5

申请日：1996-07-30

Applicant: LSI Logic Corporation

Inventor： DULAC, Keith, Bernard ,  PHILLIPS, Grover, George

IPC: G06F11/00 ,  H04N7/173

CPC classification number: G06F11/201 ,  G06F11/1076 ,  G06F2201/85 ,  G06F2211/1014 ,  H04N7/17336

Abstract: An apparatus includes a first bus, a second bus, and a storage module having a first and second output with the first output being connected to the first bus and a second output being connected to the second bus. A first buffer storage and a second buffer storage in which the first buffer storage is connected to the first bus and the second buffer storage is connected to the second bus. The second buffer storage includes an error correction module. First and second network adapters are connected to the first and second buses respectively. The first network adapter also includes a connection to the first buffer. A processor in the apparatus includes a first processor circuitry for transferring the data using a first path through the first output in the storage module to the first buffer storage and from the first buffer storage to the first network adapter. A second processor circuitry is for transferring data using a second path through the second output to the second buffer storage through the error correction module and from the second buffer storage to the second network adapter, wherein the second processor circuitry is responsive to an error in the storage module.

公开(公告)号：EP1094386A1

公开(公告)日：2001-04-25

申请号：EP98919636.5

申请日：1998-05-18

Applicant: Hitachi, Ltd.

Inventor： FUJIMOTO, Kazuhisa, Centr. Res. Lab. Hitachi Ltd. ,  FUJIBAYASHI, Akira, Centr. Res. Lab. Hitachi Ltd. ,  MINOWA, Nobuyuki, Data Storage Retrieval Syst. Di

IPC: G06F3/06

CPC classification number: G06F3/0658 ,  G06F3/061 ,  G06F3/0626 ,  G06F3/0635 ,  G06F3/0689 ,  G06F11/1666 ,  G06F11/2007 ,  G06F11/201 ,  G06F12/084 ,  G06F12/0866

Abstract: This invention relates to a disk array controller. There has been demand for a large scale memory device system operable without interruption. Further, in order to cope with the recent trend toward open systems, scalability of performance and capacity in such systems is needed.
Conventionally, internal buses such as ones which connect the channel interface section to the shared memory section, and the disk interface section to the shared memory section, have been mounted on one platter, and the channel interface and other packages have been mounted thereon. If the internal buses have failed, the operation of the whole system must be stopped. There has been another problem that the performance of the internal buses is fixed.
A disk array controller according to this invention comprises an interface platter on which a channel interface section and a disk interface section are mounted, a memory platter on which a shared memory section is mounted, and a cable which connects the interface platter to the memory platter in order to solve the above problems.

Abstract translation: 本发明涉及一种磁盘阵列控制器。 需要大量的存储器件系统可操作而不中断。 此外，为了应对最近开放系统的趋势，需要这种系统的性能和容量的可扩展性。 通常，将一个将通道接口部分连接到共享存储器部分的内部总线和共享存储器部分的盘接口部分安装在一个盘片上，并且其上安装了通道接口和其他包装。 如果内部总线出现故障，整个系统的运行必须停止。 还有一个问题是内部总线的性能是固定的。 根据本发明的磁盘阵列控制器包括其上安装有通道接口部分和磁盘接口部分的接口拼盘，其上安装有共享存储器部分的存储器盘片和将接口盘连接到存储器盘片的电缆 以解决上述问题。

公开(公告)号：EP0780765A3

公开(公告)日：1999-12-22

申请号：EP96309220.0

申请日：1996-12-17

Applicant: SYMBIOS LOGIC INC.

Inventor： DeKoning, Rodney A. ,  Fredin, Gerald J.

IPC: G06F11/20 ,  G06F11/14 ,  G11B20/18

CPC classification number: G06F11/2094 ,  G06F11/201 ,  G11B20/1833

Abstract: The present invention provides for data processing system that includes an improved architecture for providing hot spare storage devices. Specifically, the data processing can include a bus (112, 114) connected to one or more computer systems (102, 104) and a number of storage subsystems (106, 108, 110). Each storage subsystem includes storage devices (D1-D12) and a controller (302, 304), wherein the controller in a storage subsystem provides for connection to the bus and an interface for controlling data transfers to and from the storage device. A backup storage system is connected to the bus and the data processing system also includes a detection means for detecting a failure of a storage device within one of the plurality of storage subsystems and a backup means for using the backup storage device to replace the failed storage device.

公开(公告)号：EP0858200A3

公开(公告)日：1999-10-06

申请号：EP98300801.2

申请日：1998-02-04

Applicant: Compaq Computer Corporation

Inventor： McCarty, James F.

IPC: H04L29/06

CPC classification number: G06F11/201 ,  H04L12/433 ,  H04L67/42

Abstract: A computer system has a plurality of devices compatible with the Fibre Channel Protocol, wherein at least two of the devices are initiators. The computer system is provided with the capability to control and manage multiple initiators configured in an Arbitrated Loop. This capability is realized by manipulating the contents in outstanding_link_services arrays associated with the initiators.

公开(公告)号：EP0526487B1

公开(公告)日：1997-10-08

申请号：EP91907736.2

申请日：1991-04-05

Applicant: STORAGE TECHNOLOGY CORPORATION

Inventor： MILLIGAN, Charles, Allen ,  RUDESEAL, George, Arthur

IPC: G06F11/10

CPC classification number: G11B20/1833 ,  G06F3/0601 ,  G06F11/1008 ,  G06F11/1076 ,  G06F11/2007 ,  G06F11/201 ,  G06F11/2089 ,  G06F11/2094 ,  G06F2003/0692

Abstract: The parallel disk drive array data storage subsystem maps between virtual and physical data storage devices and schedules the writing of data to these devices. The data storage subsystem functions as a conventional large form factor disk drive memory, using an array of redundancy groups, each containing N+M disk drives. A performance improvement is obtained by eliminating redundancy data updates in the redundancy group by writing modified virtual track instances into previously emptied logical tracks and marking the data contained in the previous virtual track instance location as invalid. Logical cylinders containing a mixture of valid and invalid virtual tracks are emptied by writing all the valid virtual tracks into a previously emptied logical cylinder as a background process.

公开(公告)号：EP0780765A2

公开(公告)日：1997-06-25

申请号：EP96309220.0

申请日：1996-12-17

Applicant: SYMBIOS LOGIC INC.

Inventor： DeKoning, Rodney A. ,  Fredin, Gerald J.

IPC: G06F11/20 ,  G06F11/14 ,  G11B20/18

CPC classification number: G06F11/2094 ,  G06F11/201 ,  G11B20/1833

Abstract: The present invention provides for data processing system that includes an improved architecture for providing hot spare storage devices. Specifically, the data processing can include a bus (112, 114) connected to one or more computer systems (102, 104) and a number of storage subsystems (106, 108, 110). Each storage subsystem includes storage devices (D1-D12) and a controller (302, 304), wherein the controller in a storage subsystem provides for connection to the bus and an interface for controlling data transfers to and from the storage device. A backup storage system is connected to the bus and the data processing system also includes a detection means for detecting a failure of a storage device within one of the plurality of storage subsystems and a backup means for using the backup storage device to replace the failed storage device.

Abstract translation: 本发明提供了用于数据处理系统包括：做改进的体系结构，用于提供热备份存储设备。 具体而言，数据处理可以包括连接到一个或多个计算机系统（102，104）和多个存储子系统（106，108，110）的总线（112，114）。 每个存储子系统包括存储设备（D1-D12）和一个控制器（302，304）worin在存储子系统中的控制器提供用于连接到总线和接口，用于控制数据传输到和从该存储装置。 备份存储系统连接到总线，因此，数据处理系统包括：一个检测装置，用于存储子系统的多个一个内检测到的存储装置的故障和备用用于使用所述备份存储设备来替换故障存储 装置。