公开(公告)号：US20060182404A1

公开(公告)日：2006-08-17

申请号：US11400301

申请日：2006-04-07

Applicant: Michael Goldstein

Inventor： Michael Goldstein

IPC: G02B6/10

CPC classification number: B81C1/00666 ,  B81B2201/042 ,  B81C2201/0167 ,  G02B5/0833 ,  G02B26/0833 ,  Y10S438/954

Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).

公开(公告)号：US20040164368A1

公开(公告)日：2004-08-26

申请号：US10782297

申请日：2004-02-18

Inventor： Michael Goldstein

IPC: H01L029/82 ,  H01L023/58

CPC classification number: B81C1/00666 ,  B81B2201/042 ,  B81C2201/0167 ,  G02B5/0833 ,  G02B26/0833 ,  Y10S438/954

Abstract: An optical device having a high reflector tunable stress coating includes a micro-electromechanical system (MEMS) platform, a mirror disposed on the MEMS platform, and a multiple layer coating disposed on the mirror. The multiple layer coating includes a layer of silver (Ag), a layer of silicon dioxide (SiO2) deposited on the layer of Ag, a layer of intrinsic silicon (Si) deposited on the layer of SiO2, and a layer of silicon oxynitride (SiOxNy) deposited on the layer of Si. The concentration of nitrogen is increased and/or decreased to tune the stress (e.g., tensile, none, compressive).

Abstract translation: 具有高反射器可调应力涂层的光学装置包括微机电系统（MEMS）平台，设置在MEMS平台上的反射镜和设置在反射镜上的多层涂层。 多层涂层包括银（Ag）层，沉积在Ag层上的二氧化硅（SiO 2）层，沉积在SiO 2层上的本征硅（Si）层和氮氧化硅层 SiO x N y）沉积在Si层上。 氮的浓度增加和/或降低以调节应力（例如，拉伸，无，压缩）。

公开(公告)号：US06768181B2

公开(公告)日：2004-07-27

申请号：US10461036

申请日：2003-06-13

Applicant: Paul W Dwyer

Inventor： Paul W Dwyer

IPC: H01L2984

CPC classification number: B81C99/0035 ,  B81C1/00666 ,  B81C99/0065 ,  B81C2201/0167

Abstract: Micro-machined electromechanical sensor (MEMS) devices having feature orientation delicately adjusted after initial formation and installation within the device packaging to trim one or more performance parameters of interest, including modulation, bias and other dynamic behaviors of the MEMS devices.

Abstract translation: 微机械机电传感器（MEMS）器件具有在器件封装中初始形成和安装之后精细调整的特征取向，以修剪一个或多个感兴趣的性能参数，包括MEMS器件的调制，偏置和其他动态行为。

公开(公告)号：US06750077B2

公开(公告)日：2004-06-15

申请号：US10352027

申请日：2003-01-28

Applicant: Pablo O. Vaccaro

Inventor： Pablo O. Vaccaro

IPC: H01L2100

CPC classification number: B81C1/00666 ,  B81C2201/0167 ,  H01L33/0079 ,  H01L33/20 ,  H01S5/18366

Abstract: A release layer composed of AlGaAs, a strain layer, a strain compensation layer composed of an InGaAs, and a component layer are formed on a GaAs substrate. The component layer includes a DBR film. A recess for defining a bent region is formed in the component layer. The component layer, the strain compensation layer, the strain layer, and the release layer are removed in an approximately U shape, thereby forming a groove. The release layer under the strain layer is selectively removed. The strain layer is bent at a region below the recess so as to relax strain caused by the difference in the lattice constant between the InGaAs layer and the GaAs layer, and the component layer stands perpendicularly to the GaAs substrate.

Abstract translation: 在GaAs衬底上形成由AlGaAs构成的剥离层，应变层，由InGaAs构成的应变补偿层和成分层。 组件层包括DBR膜。 在组件层中形成用于限定弯曲区域的凹部。 将组分层，应变补偿层，应变层和剥离层以大致U形除去，从而形成槽。 有选择地去除应变层下的剥离层。 应变层在凹部下方的区域弯曲，以缓和由InGaAs层和GaAs层之间的晶格常数差引起的应变，并且元件层垂直于GaAs衬底竖立。

公开(公告)号：US20020068370A1

公开(公告)日：2002-06-06

申请号：US09963142

申请日：2001-09-24

Inventor： Paul W. Dwyer

IPC: H01L021/66 ,  G01R031/26 ,  H01L021/00

CPC classification number: B81C99/0035 ,  B81C1/00666 ,  B81C99/0065 ,  B81C2201/0167

Abstract: A method for delicately adjusting an orientation of features in completed micro-machined electromechanical sensor (MEMS) devices after initial formation and installation within the device packaging to trim one or more performance parameters of interest, including modulation, bias and other dynamic behaviors of the MEMS devices.

Abstract translation: 一种在初始形成和安装在器件封装中之后精细调整完成的微加工机电传感器（MEMS）器件中的特征取向的方法，以修剪一个或多个感兴趣的性能参数，包括MEMS的调制，偏置和其他动态行为 设备。

公开(公告)号：US06328794B1

公开(公告)日：2001-12-11

申请号：US08944852

申请日：1997-10-06

Applicant: Donald Walter Brouillette ,  Timothy Charles Krywanczyk ,  Jerome Brett Lasky ,  Rick Lawrence Mohler ,  Wolfgang Otto Rauscher

Inventor： Donald Walter Brouillette ,  Timothy Charles Krywanczyk ,  Jerome Brett Lasky ,  Rick Lawrence Mohler ,  Wolfgang Otto Rauscher

IPC: C30B102

CPC classification number: H01L21/02667 ,  B81C1/00666 ,  B81C2201/0167 ,  B81C2201/0169 ,  H01L21/02532 ,  H01L21/2022 ,  H01L27/1087 ,  H01L29/66181

Abstract: A method of providing a predetermined level and state of stress in a film deposited on a surface of a substrate. In one embodiment, a layer of crystalline material is deposited on a surface of a substrate and then a layer of amorphous material is deposited on the layer of crystalline material. Then, the layers are heated, causing the amorphous material to crystallize. Such crystallization reduces, or even changes the state of, stress in the amorphous layer, which in turn alters the forces applied by the layer to adjacent regions of the substrate. The method may be used for filling a deep-trench capacitor of the type used in trench-storage DRAMs.

Abstract translation: 在沉积在基板的表面上的膜中提供预定水平和应力状态的方法。 在一个实施例中，将一层结晶材料沉积在衬底的表面上，然后将非晶材料层沉积在结晶材料层上。 然后，层被加热，导致无定形材料结晶。 这种结晶减少或者甚至改变了非晶层中的应力状态，这进一步改变了由层施加到衬底的相邻区域的力。 该方法可以用于填充在沟槽存储DRAM中使用的类型的深沟槽电容器。

公开(公告)号：WO2013036436A1

公开(公告)日：2013-03-14

申请号：PCT/US2012/053208

申请日：2012-08-30

Applicant: QUALCOMM MEMS TECHNOLOGIES, INC. ,  PU, Chuan ,  TAO, Yi ,  TUPELLY, Chandra S. ,  DJORDJEV, Kostadin D. ,  ZHONG, Fan ,  HE, Rihui ,  ZHANG, Wenyue

Inventor： PU, Chuan ,  TAO, Yi ,  TUPELLY, Chandra S. ,  DJORDJEV, Kostadin D. ,  ZHONG, Fan ,  HE, Rihui ,  ZHANG, Wenyue

IPC: G02B26/00 ,  B81B3/00 ,  B81C1/00

CPC classification number: G02B26/001 ,  B81B3/0072 ,  B81B2201/042 ,  B81B2203/019 ,  B81C2201/0167 ,  B81C2201/017

Abstract: This disclosure provides systems, methods and apparatus for controlling a movable layer. In one aspect, an electromechanical systems device includes a substrate and a movable layer positioned over the substrate to define a gap. The movable layer is movable in the gap between an actuated position and a relaxed position, and includes a mirror layer, a cap layer, and a dielectric layer disposed between the mirror layer and the cap layer. The movable layer is configured to have a curvature in a direction away from the substrate when the movable layer is in the relaxed position. In some implementations, the movable layer can be formed to have a positive stress gradient directed toward the substrate that can direct the curvature of the movable layer upward when the sacrificial layer is removed.

Abstract translation: 本公开提供了用于控制可移动层的系统，方法和装置。 在一个方面，机电系统装置包括基板和位于基板上方以限定间隙的可移动层。 可移动层可以在致动位置和松弛位置之间的间隙中移动，并且包括镜层，盖层和设置在镜层和盖层之间的介电层。 可移动层被配置为当可移动层处于松弛位置时具有远离基底的方向的曲率。 在一些实施方案中，可移动层可以形成为具有朝向衬底的正应力梯度，当消除牺牲层时，可以将可移动层的曲率向上引导。

公开(公告)号：WO2011162950A3

公开(公告)日：2012-05-24

申请号：PCT/US2011039564

申请日：2011-06-08

Applicant: IBM ,  HERRIN RUSSELL T ,  JAHNES CHRISTOPHER V ,  STAMPER ANTHONY K ,  WHITE ERIC J

Inventor： HERRIN RUSSELL T ,  JAHNES CHRISTOPHER V ,  STAMPER ANTHONY K ,  WHITE ERIC J

IPC: B81C1/00 ,  B81B3/00 ,  H01H59/00

CPC classification number: B81C1/00365 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) cavity (60b) includes forming a first sacrificial cavity layer (18) over a wiring layer (14) and substrate (10). The method further includes forming an insulator layer (40) over the first sacrificial cavity layer. The method further includes performing a reverse damascene etchback process on the insulator layer. The method further includes planarizing the insulator layer and the first sacrificial cavity layer. The method further includes venting or stripping of the first sacrificial cavity layer to a planar surface for a first cavity (60b) of the MEMS.

Abstract translation: 形成至少一个微机电系统（MEMS）腔（60b）的方法包括在布线层（14）和衬底（10）上形成第一牺牲腔层（18）。 该方法还包括在第一牺牲腔层上形成绝缘体层（40）。 该方法还包括在绝缘体层上执行反向镶嵌回蚀工艺。 该方法还包括平坦化绝缘体层和第一牺牲腔层。 该方法还包括将第一牺牲腔层排出或剥离到用于MEMS的第一腔（60b）的平坦表面。

公开(公告)号：WO2011162953A3

公开(公告)日：2012-04-19

申请号：PCT/US2011039571

申请日：2011-06-08

Applicant: IBM ,  DUNBAR GEORGE A ,  HE ZHONG-XIANG ,  MALING JEFFREY C ,  MURPHY WILLIAM J ,  STAMPER ANTHONY K

Inventor： DUNBAR GEORGE A ,  HE ZHONG-XIANG ,  MALING JEFFREY C ,  MURPHY WILLIAM J ,  STAMPER ANTHONY K

IPC: H01L23/48 ,  B81B7/00

CPC classification number: B81C1/00365 ,  B81B3/0021 ,  B81B3/0072 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires (14) from the lower wiring layer. The method further includes forming an electrode beam (38) over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition (50).

Abstract translation: 形成至少一个微机电系统（MEMS）的方法包括在基板上形成下布线层。 该方法还包括从下布线层形成多个分立布线（14）。 该方法还包括在多个离散导线上形成电极束（38）。 形成电极束和多个离散导线中的至少一个形成有最小化后续硅沉积（50）中的小丘和三个点的布局。

公开(公告)号：WO2011162953A2

公开(公告)日：2011-12-29

申请号：PCT/US2011/039571

申请日：2011-06-08

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  DUNBAR, George, A. ,  HE, Zhong-Xiang ,  MALING, Jeffrey, C. ,  MURPHY, William, J. ,  STAMPER, Anthony, K.

Inventor： DUNBAR, George, A. ,  HE, Zhong-Xiang ,  MALING, Jeffrey, C. ,  MURPHY, William, J. ,  STAMPER, Anthony, K.

IPC: H01L23/48 ,  B81B7/00

CPC classification number: B81B3/0072 ,  B81B3/0021 ,  B81B2201/01 ,  B81B2201/014 ,  B81B2203/0118 ,  B81B2203/0315 ,  B81B2203/04 ,  B81C1/0015 ,  B81C1/00365 ,  B81C1/00476 ,  B81C1/00619 ,  B81C1/00626 ,  B81C1/00666 ,  B81C2201/0109 ,  B81C2201/013 ,  B81C2201/0167 ,  B81C2201/017 ,  B81C2203/0136 ,  B81C2203/0172 ,  G06F17/5068 ,  G06F17/5072 ,  H01H1/0036 ,  H01H57/00 ,  H01H59/0009 ,  H01H2057/006 ,  H01L41/1136 ,  H01L2924/0002 ,  Y10S438/937 ,  Y10T29/42 ,  Y10T29/435 ,  Y10T29/49002 ,  Y10T29/49105 ,  Y10T29/49121 ,  Y10T29/49126 ,  Y10T29/4913 ,  Y10T29/49155 ,  Y10T29/5313 ,  H01L2924/00

Abstract: A method of forming at least one Micro-Electro-Mechanical System (MEMS) includes forming a lower wiring layer on a substrate. The method further includes forming a plurality of discrete wires (14) from the lower wiring layer. The method further includes forming an electrode beam (38) over the plurality of discrete wires. The at least one of the forming of the electrode beam and the plurality of discrete wires are formed with a layout which minimizes hillocks and triple points in subsequent silicon deposition (50).

Abstract translation: 形成至少一个微机电系统（MEMS）的方法包括在基板上形成下布线层。 该方法还包括从下布线层形成多个分立布线（14）。 该方法还包括在多个离散导线上形成电极束（38）。 形成电极束和多个离散导线中的至少一个形成有最小化后续硅沉积（50）中的小丘和三点的布局。