TRANSMISSION SUR BUS I2C
    37.
    发明公开
    TRANSMISSION SUR BUS I2C 有权
    传输通过I2C总线

    公开(公告)号:EP2368192A1

    公开(公告)日:2011-09-28

    申请号:EP09803832.6

    申请日:2009-12-10

    CPC classification number: G06F13/4291

    Abstract: The invention relates to a method and to a system for the multi-channel transmission over a dual wire bus including a data signal (SDA) and a clock signal (SCL), data of a first channel being transmitted by encoding the state of the data signal during a period including a first state of the clock signal, and data of a second channel being transmitted by pulse encoding outside said period.

    MEMOIRE A STRUCTURE DU TYPE EEPROM ET A LECTURE SEULE
    38.
    发明公开
    MEMOIRE A STRUCTURE DU TYPE EEPROM ET A LECTURE SEULE 有权
    MEMOIRE结构DU TYPE EEPROM ET LEARURE SEULE

    公开(公告)号:EP2286450A1

    公开(公告)日:2011-02-23

    申请号:EP09757723.3

    申请日:2009-05-12

    Inventor: FORNARA, Pascal

    Abstract: A non-volatile memory including at least first and second memory cells each including a storage MOS transistor with dual gates and an insulation layer provided between the two gates. The insulation layer of the storage transistor of the second memory cell includes at least one portion that is less insulating than the insulation layer of the storage transistor of the first memory cell.

    Abstract translation: 一种非易失性存储器,至少包括第一和第二存储单元,每个存储单元包括具有双栅极的存储MOS晶体管和设置在两个栅极之间的绝缘层。 第二存储器单元的存储晶体管的绝缘层包括绝缘层比第一存储器单元的存储晶体管的绝缘层更少的至少一个部分。

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