公开(公告)号：US20190157176A1

公开(公告)日：2019-05-23

申请号：US15818508

申请日：2017-11-20

Applicant: STMICROELECTRONICS (MALTA) LTD

Inventor： David BONNICI ,  Brenda FARRUGIA

IPC: H01L23/31 ,  H01L25/16 ,  H01L23/00 ,  H01L23/29 ,  H01L21/56 ,  H01L21/78

CPC classification number: H01L23/3135 ,  H01L21/561 ,  H01L21/565 ,  H01L21/78 ,  H01L23/296 ,  H01L23/3121 ,  H01L24/48 ,  H01L25/165 ,  H01L25/167 ,  H01L27/14618 ,  H01L27/14634 ,  H01L27/14636 ,  H01L27/1469 ,  H01L31/02005 ,  H01L31/0203 ,  H01L33/486 ,  H01L33/56 ,  H01L33/62 ,  H01L2224/48091 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/1204 ,  H01L2933/0033 ,  H01L2933/005 ,  H01L2224/45099

Abstract: One or more embodiments are directed to a semiconductor package that includes transparent encapsulation material and an opaque encapsulation material. In one embodiment, the opaque encapsulation material is thicker than the transparent encapsulation material; however, the outer surfaces of the opaque and the transparent encapsulation materials are coplanar with each other.

公开(公告)号：US10225635B2

公开(公告)日：2019-03-05

申请号：US15143207

申请日：2016-04-29

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Roberto Brioschi ,  Alex Gritti ,  Kevin Formosa ,  Paul Anthony Barbara

IPC: H01L27/14 ,  H04R1/04 ,  B81B7/00 ,  H04R19/00 ,  H04R19/04 ,  H04R1/06 ,  H04R31/00

Abstract: A microelectromechanical microphone includes: a substrate; a sensor chip, integrating a microelectromechanical electroacoustic transducer; and a control chip operatively coupled to the sensor chip. In one embodiment, the sensor chip and the control chip are bonded to the substrate, and the sensor chip overlies, or at least partially overlies, the control chip. In another embodiment, the sensor is bonded to the substrate and a barrier is located around at least a portion of the sensor chip.

公开(公告)号：US20180194131A1

公开(公告)日：2018-07-12

申请号：US15917231

申请日：2018-03-09

Applicant: STMICROELECTRONICS, INC. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Simon DODD ,  Ivan ELLUL ,  Christopher BRINCAT

IPC: B41J2/01 ,  B41J2/14 ,  B41J2/045

CPC classification number: B41J2/01 ,  B41J2/04548 ,  B41J2/14072 ,  B41J2/14201 ,  B41J2/1433 ,  B41J2002/14362 ,  B41J2002/14491

Abstract: One or more embodiments are directed to a microfluidic assembly that includes an interconnect substrate coupled to a microfluidic die. In one embodiment, the microfluidic die includes a ledge with a plurality of bond pads. The microfluidic assembly further includes an interconnect substrate having an end resting on the ledge proximate the bond pads. In another embodiment, the interconnect substrate abuts a side surface of the ledge or is located proximate the ledge. Conductive elements couple the microfluidic die to contacts of the interconnect substrate. Encapsulant is located over the conductive elements, the bond pads, the contacts.

公开(公告)号：US09446943B2

公开(公告)日：2016-09-20

申请号：US14288130

申请日：2014-05-27

Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Malta) Ltd

Inventor： Kevin Formosa ,  Luca Maggi

IPC: H01L29/84 ,  B81B7/00 ,  H01L25/065 ,  H01L25/00 ,  B81B3/00 ,  B81C1/00 ,  H01L23/00 ,  H01L23/31 ,  H01L21/56

CPC classification number: B81B7/007 ,  B81B3/0094 ,  B81B2207/012 ,  B81B2207/07 ,  B81B2207/095 ,  B81B2207/097 ,  B81C1/00238 ,  B81C1/00301 ,  B81C2203/00 ,  B81C2203/0136 ,  B81C2203/0792 ,  H01L21/561 ,  H01L23/3114 ,  H01L24/73 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L29/84 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/48145 ,  H01L2224/73265 ,  H01L2224/81005 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2924/12042 ,  H01L2924/181 ,  H01L2224/85 ,  H01L2224/83 ,  H01L2224/81 ,  H01L2924/00012 ,  H01L2924/00

Abstract: A wafer-level packaging, comprising: a first semiconductor body integrating a MEMS structure; a second semiconductor body, including a surface electrical-contact region and an ASIC coupled to the MEMS structure and to said electrical-contact region; a first coating layer, made of resin, which englobes and protects the first body, the second body, and the electrical-contact region; at least one first conductive through via, which extends through the first coating layer in an area corresponding, and electrically coupled, to the first electrical-contact region; an electrical-contact pad, which extends over the first coating layer, electrically coupled to the first conductive through via; a third semiconductor body, integrating an electronic circuit, glued on the first coating layer; a second coating layer, made of resin, which englobes and protects the third body; at least one second conductive through via, which extends completely through the second coating layer in an area corresponding, and electrically coupled, to the electrical-contact pad; and a further electrical-contact pad electrically coupled to the second conductive through via.

Abstract translation: 一种晶片级封装，包括：集成MEMS结构的第一半导体本体; 包括表面电接触区域和耦合到所述MEMS结构和所述电接触区域的ASIC的第二半导体本体; 由树脂制成的第一涂层，其包围并保护第一主体，第二主体和电接触区域; 至少一个第一导电通孔，其在与第一电接触区域对应并电耦合的区域中延伸穿过第一涂层; 电接触焊盘，其在所述第一涂层上延伸，电耦合到所述第一导电通孔; 第三半导体本体，集成在第一涂层上的电子电路; 由树脂制成的第二涂层，其缠绕并保护第三体; 至少一个第二导电通孔，其在对应于并电耦合到所述电接触焊盘的区域中完全延伸穿过所述第二涂层; 以及电耦合到第二导电通孔的另一个电接触焊盘。

公开(公告)号：US20160261941A1

公开(公告)日：2016-09-08

申请号：US14943848

申请日：2015-11-17

Applicant: STMICROELECTRONICS S.R.L. ,  STMICROELECTRONICS (MALTA) LTD

Inventor： Roberto BRIOSCHI ,  Silvia ADORNO ,  Kenneth FONK

IPC: H04R1/08 ,  B81C1/00 ,  H04R31/00 ,  B81B7/00 ,  H04R19/00 ,  H04R19/04

CPC classification number: H04R1/086 ,  B81B7/0058 ,  B81B7/0061 ,  B81B2201/0257 ,  B81B2203/0127 ,  B81B2207/012 ,  B81B2207/07 ,  B81C1/00309 ,  B81C2203/0785 ,  H01L2224/48137 ,  H01L2224/48227 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R31/006

Abstract: A semiconductor integrated device, comprising: a package defining an internal space and having an acoustic-access opening in acoustic communication with an environment external to the package; a MEMS acoustic transducer, housed in the internal space and provided with an acoustic chamber facing the acoustic-access opening; and a filtering module, which is designed to inhibit passage of contaminating particles having dimensions larger than a filtering dimension and is set between the MEMS acoustic transducer and the acoustic-access opening. The filtering module defines at least one direct acoustic path between the acoustic-access opening and the acoustic chamber.

Abstract translation: 一种半导体集成器件，包括：限定内部空间并且具有与所述封装外部的环境声学连通的声学通路开口的封装; MEMS声学换能器，其容纳在内部空间中并且设置有面向声学进入开口的声学室; 以及过滤模块，其设计成抑制具有大于过滤尺寸的尺寸的污染颗粒的通过并设置在MEMS声学换能器和声学通路开口之间。 滤波模块限定声学通道开口和声学室之间的至少一个直接声路径。

公开(公告)号：US09390988B2

公开(公告)日：2016-07-12

申请号：US13630872

申请日：2012-09-28

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Mark A. Azzopardi ,  Kevin Formosa ,  Ivan Ellul

IPC: B32B1/02 ,  B32B15/01 ,  H05K5/03 ,  B23K1/20 ,  H01L23/10 ,  B81C1/00

CPC classification number: H01L23/10 ,  B81C1/00269 ,  B81C2203/019 ,  H01L2924/0002 ,  H01L2924/16152 ,  Y10T428/1241 ,  Y10T428/13 ,  H01L2924/00

Abstract: One embodiment discloses a method for soldering a cap for an integrated electronic device to a support layer, including the steps of: providing a support layer; providing a cap including a core of a first material and a coating layer of a second material, the first and second material being respectively wettable and non-wettable with respect to a solder, the coating layer being arranged so as to expose a surface of the core; coupling the cap with the support layer; and soldering the surface of the core to the support layer, by means of the solder.

Abstract translation: 一个实施例公开了一种用于将集成电子设备的盖焊接到支撑层的方法，包括以下步骤：提供支撑层; 提供包括第一材料的芯和第二材料的涂层的盖，所述第一和第二材料分别相对于焊料可润湿和不可湿润，所述涂层被布置为暴露所述第一材料的表面 核心; 将盖与支撑层联接; 并通过焊料将芯的表面焊接到支撑层。

公开(公告)号：US20160090301A1

公开(公告)日：2016-03-31

申请号：US14498824

申请日：2014-09-26

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Conrad Cachia

IPC: B81C1/00 ,  B81B7/00

CPC classification number: B81C1/00238 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/73207 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: One or more embodiments of the present disclosure are directed to packages that include a stacked microelectromechanical sensor MEMS die and an application-specific integrated circuit (ASIC) die. The smaller of the MEMS die and the ASIC die is stacked on the larger of the MEMS die and the ASIC die. The larger of the two dice may form one or more dimensions of the package. In one embodiment, a bottom surface of the larger of the two dice forms an outer surface of the package. In that regard, the package may take less lateral space on another component, such as a board or other package.

Abstract translation: 本公开的一个或多个实施例涉及包括堆叠的微机电传感器MEMS管芯和专用集成电路（ASIC）管芯的封装。 MEMS裸片和ASIC芯片中的较小的芯片堆叠在较大的MEMS芯片和ASIC芯片上。 两个骰子中较大的一个可以形成包装的一个或多个尺寸。 在一个实施例中，两个骰子中较大者的底表面形成包装的外表面。 在这方面，包装可能在另一个部件（例如电路板或其他包装）上占用更少的横向空间。

公开(公告)号：US09290377B2

公开(公告)日：2016-03-22

申请号：US14554473

申请日：2014-11-26

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Conrad Cachia ,  Kenneth Fonk

IPC: H01L21/00 ,  B81B7/00 ,  B81C1/00 ,  B81C3/00 ,  H01L21/683 ,  H01L25/065 ,  H01L25/00 ,  H01L23/00

CPC classification number: B81B7/0074 ,  B81C1/0023 ,  B81C3/001 ,  H01L21/6836 ,  H01L24/05 ,  H01L24/06 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/92 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2221/68331 ,  H01L2224/04026 ,  H01L2224/04042 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/0603 ,  H01L2224/27005 ,  H01L2224/2732 ,  H01L2224/27334 ,  H01L2224/27848 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/48091 ,  H01L2224/48105 ,  H01L2224/48229 ,  H01L2224/73215 ,  H01L2224/73265 ,  H01L2224/83191 ,  H01L2224/83211 ,  H01L2224/83856 ,  H01L2224/83862 ,  H01L2224/92 ,  H01L2224/92147 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2225/0651 ,  H01L2924/00014 ,  H01L2924/10157 ,  H01L2924/12042 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/161 ,  H01L2924/01014 ,  H01L2924/0665 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/27 ,  H01L21/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A method of stacking a plurality of first dies to a respective plurality of second dies, each one of the first dies having a surface including a surface coupling region which is substantially flat, each one of the second dies having a respective surface including a respective surface coupling region which is substantially flat, the method comprising the steps of: forming, by means of a screen printing technique, an adhesive layer on the first dies at the respective surface coupling regions; and arranging the surface coupling region of each second die in direct physical contact with a respective adhesive layer of a respective first die among said plurality of first dies.

Abstract translation: 一种将多个第一管芯堆叠到相应的多个第二管芯的方法，每个第一管芯具有包括基本平坦的表面结合区域的表面，每个第二管芯具有包括相应表面的相应表面 该方法包括以下步骤：通过丝网印刷技术在相应的表面耦合区域上形成在第一裸片上的粘合剂层; 并且每个第二管芯的表面耦合区域与所述多个第一管芯中相应的第一管芯的相应的粘合剂层直接物理接触。

公开(公告)号：US09257372B2

公开(公告)日：2016-02-09

申请号：US14032075

申请日：2013-09-19

Applicant: STMicroelectronics (Malta) Ltd ,  STMicroelectronics Pte Ltd

Inventor： Roseanne Duca ,  Kim-Yong Goh ,  Xueren Zhang ,  Kevin Formosa

IPC: H01L23/495 ,  H01L21/56 ,  G01P1/02 ,  H01L23/31 ,  H05K3/30 ,  H05K3/34

CPC classification number: H01L23/49541 ,  G01P1/023 ,  H01L21/56 ,  H01L21/565 ,  H01L23/3107 ,  H01L2224/45147 ,  H01L2224/48247 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/1461 ,  H01L2924/1815 ,  H05K3/303 ,  H05K3/3421 ,  H05K2201/09781 ,  Y02P70/613 ,  H01L2924/00 ,  H01L2924/01005 ,  H01L2224/45099

Abstract: A surface mount package of a semiconductor device, has: an encapsulation, housing at least one die including semiconductor material; and electrical contact leads, protruding from the encapsulation to be electrically coupled to contact pads of a circuit board; the encapsulation has a main face designed to face a top surface of the circuit board, which is provided with coupling features designed for mechanical coupling to the circuit board to increase a resonant frequency of the mounted package. The coupling features envisage at least a first coupling recess defined within the encapsulation starting from the main face, designed to be engaged by a corresponding coupling element fixed to the circuit board, thereby restricting movements of the mounted package.

Abstract translation: 半导体器件的表面贴装封装具有：封装，容纳至少一个包含半导体材料的管芯; 以及电接触引线，从封装凸出以电耦合到电路板的接触焊盘; 封装具有设计成面向电路板的顶表面的主面，该主面具有设计成用于机械耦合到电路板的耦合特征，以增加安装封装的谐振频率。 耦合特征设想至少一个第一耦合凹槽，其限定在从主面开始的封装内，被设计成由固定到电路板的对应耦合元件接合，从而限制安装的封装的移动。

公开(公告)号：US09253579B2

公开(公告)日：2016-02-02

申请号：US13648213

申请日：2012-10-09

Applicant: STMicroelectronics (Malta) Ltd

Inventor： Kevin Formosa

IPC: H01L23/12 ,  H01L23/02 ,  H01L21/00 ,  H04R19/00 ,  B81B7/00

CPC classification number: B81B7/0074 ,  B81B7/0061 ,  B81B2201/0257 ,  B81B2207/012 ,  B81C1/00309 ,  H01L2224/48091 ,  H01L2224/48137 ,  H01L2224/48227 ,  H01L2224/4824 ,  H04R19/005 ,  H04R19/04 ,  H04R31/00 ,  H04R2201/003 ,  H01L2924/00014

Abstract: A packaged MEMS device, wherein at least two support structures are stacked on each other and are formed both by a support layer and a wall layer coupled to each other and delimiting a respective chamber. The chamber of the first support structure is upwardly delimited by the support layer of the second support structure. A first and a second dice are accommodated in a respective chamber, carried by the respective support layer of the first support structure. The support layer of the second support structure has a through hole allowing wire connections to directly couple the first and the second dice. A lid substrate, coupled to the second support structure, closes the chamber of the second support structure.

Abstract translation: 一种封装的MEMS器件，其中至少两个支撑结构彼此堆叠并且由支撑层和彼此耦合并限定相应室的壁层形成。 第一支撑结构的腔室由第二支撑结构的支撑层向上限定。 第一和第二骰子容纳在由第一支撑结构的相应支撑层承载的相应的腔室中。 第二支撑结构的支撑层具有允许电线连接直接耦合第一和第二裸片的通孔。 耦合到第二支撑结构的盖基板封闭第二支撑结构的室。