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公开(公告)号：KR101809996B1
公开(公告)日：2017-12-19
申请号：KR1020160054171
申请日：2016-05-02
Applicant: 서울대학교산학협력단
Abstract: 본발명은깜빡임현상이개선된 LED 조명장치에관한것으로, 두개의병렬연결되는컨버터방식의 LED 구동회로를활용하여항상 LED 부하(load)에거의일정한전류를공급함으로써, AC입력전원을사용할경우발생할수 있는깜빡임(flicker) 현상을제거하고, 동시에높은역률(power factor)을달성할수 있도록한 것이다.
Abstract translation: 本发明涉及一种改善闪烁效应的LED照明装置，其利用两个并联连接的转换器型LED驱动电路一直向LED负载提供恒定电流， 闪烁现象，同时实现高功率因数。
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公开(公告)号：KR1020170130707A
公开(公告)日：2017-11-29
申请号：KR1020160061213
申请日：2016-05-19
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
CPC classification number: H03K4/501 , H03K5/1534
Abstract: 본기술에의한삼각파발생장치는제어신호와클록신호를입력받아삼각파를출력하는삼각파생성부; 및보정모드에서제어신호를결정하는삼각파제어부를포함한다.
Abstract translation: 根据本技术的三角波产生装置是接收控制信号并输出的三角波发生器的时钟信号的三角波; 以及用于在校正模式下确定控制信号的三角波控制单元。
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公开(公告)号：KR1020160060873A
公开(公告)日：2016-05-31
申请号：KR1020140162850
申请日：2014-11-20
Applicant: 에스케이하이닉스 주식회사 , 서울대학교산학협력단
IPC: G11C11/4076 , G11C11/4063 , G11C7/22 , G11C11/4074 , G11C8/18 , G11C5/14
CPC classification number: H03K5/1532 , H03K5/133 , G11C11/4076 , G11C5/147 , G11C7/22 , G11C8/18 , G11C11/4063 , G11C11/4074
Abstract: 본기술에의한반도체장치는지연제어신호에따라데이터스트로브신호를지연하여지연데이터스트로브신호를출력하는가변지연부, 지연데이터스트로브신호에동기하여기준전압과데이터신호를비교하여데이터신호의논리레벨을결정하는데이터샘플러; 및트레이닝패턴을가지는데이터신호가입력되는경우데이터샘플러의출력에따라지연제어신호와상기기준전압을결정하는제어부를포함할수 있다.
Abstract translation: 根据本发明的半导体器件可以包括可变延迟部分，其根据延迟控制信号延迟数据选通信号并输出延迟数据选通信号; 与延迟数据选通信号同步的数据采样器比较参考电压和数据信号，并确定数据信号的逻辑电平; 以及控制部件，当输入具有训练图案的数据信号时，根据数据采样器的输出来确定参考电压和延迟控制信号。 所以，数据可以正常读取。
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公开(公告)号：KR101092699B1
公开(公告)日：2011-12-09
申请号：KR1020100042733
申请日：2010-05-07
Applicant: 서울대학교산학협력단
IPC: H03K19/0948 , H03F3/70 , H03F3/45
CPC classification number: H03F3/70 , H03F3/45179 , H03F2203/45512
Abstract: 본발명은캐스코드연결된한 쌍의 PMOS 트랜지스터의각각의게이트사이와, 캐스코드연결된한 쌍의 NMOS 트랜지스터의각각의게이트사이에부트스트랩캐패시터를설치하고, 데이터샘플링단계(Φ)에서는전류기근을통해 PMOS 트랜지스터와 NMOS 트랜지스터를모두약반전동작시켜부트스트랩캐패시터에입력전압(V)과기준전압(V, V) 사이의전위차에대응된전하를저장하였다가, 전하전달단계(Φ)에서는입력전압이극성에따라 NMOS 트랜지스터쌍 또는 PMOS 트랜지스터쌍 중어느한 쌍을강반전으로구동하고다른한 쌍은컷오프동작하도록하여넓은대역폭을확보하도록하고, 전하전달후 정상상태단계(Φ)에서는 PMOS 트랜지스터와 NMOS 트랜지스터를모두약반전회귀시켜높은이득과함께전력소모를방지하는방식을제공한다.
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公开(公告)号：KR1020110132043A
公开(公告)日：2011-12-07
申请号：KR1020100051836
申请日：2010-06-01
Applicant: 서울대학교산학협력단
IPC: G02F1/1337
CPC classification number: G02F1/133753 , G02F2201/501
Abstract: PURPOSE: A liquid crystal display device, a manufacturing method thereof, and a method for manufacturing a liquid crystal aligned substrate are provided to obtain a wide viewing angle by implementing multi-domain using a protection layer with fluorine polymer. CONSTITUTION: A second substrate(2) faces a first substrate(1). A first vertically aligned layer(10) is located on the first substrate and includes a first region with a first alignment direction and a second region with a second alignment direction. A second vertically aligned layer(20) is located on the second substrate and includes a third region with a third alignment direction and a fourth region with a fourth alignment direction.
Abstract translation: 目的：提供一种液晶显示装置及其制造方法以及液晶取向基板的制造方法，通过利用氟聚合物保护层实现多域来获得宽视角。 构成：第二衬底（2）面向第一衬底（1）。 第一垂直取向层（10）位于第一基板上，并且包括具有第一取向方向的第一区域和具有第二取向方向的第二区域。 第二垂直取向层（20）位于第二基板上，并且包括具有第三取向方向的第三区域和具有第四取向方向的第四区域。
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Patent Agency Ranking
公开(公告)号：KR1020100071888A
公开(公告)日：2010-06-29
申请号：KR1020090076788
申请日：2009-08-19
Applicant: 삼성전자주식회사 , 서울대학교산학협력단
Abstract: PURPOSE: A variable capacitor, a digitally controlled oscillator, and a digital phase locked loop are provided to minimize the size of capacitance by connection a plurality of capacitor groups in parallel. CONSTITUTION: A capacitor unit(110) includes a plurality of capacitor groups which are arranged in a matrix shape. Based on line/ row selection signal with respect to the matrix, a switch unit(120) connects the capacitor groups in parallel and adjusts capacitance. A first capacitor sub-group has a first capacitance. A second capacitor sub-group has other capacitance which is different from the first capacitance. An adjust unit(130) selects the capacitor groups based on the size of the capacitances.
Abstract translation: 目的：提供可变电容器，数字控制振荡器和数字锁相环，以通过并联连接多个电容器组来最小化电容的尺寸。 构成：电容器单元（110）包括以矩阵形状排列的多个电容器组。 基于相对于矩阵的线/行选择信号，开关单元（120）并联连接电容器组并调整电容。 第一电容器子组具有第一电容。 第二电容器子组具有与第一电容不同的其它电容。 调整单元（130）基于电容的大小来选择电容器组。
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公开(公告)号：KR101632657B1
公开(公告)日：2016-06-23
申请号：KR1020090076780
申请日：2009-08-19
Applicant: 삼성전자주식회사 , 서울대학교산학협력단
Abstract: 타임투디지털컨버터가개시된다. 본타임투디지털컨버터는, 제1 신호및 제2 신호를수신하며, 직렬연결된복수의지연소자를이용하여제2 신호를단계적으로지연시키고, 지연된제2 신호와제1 신호를비교하여제1 신호에대한제2 신호의위상에러를출력하는컨버터, 제1 신호및 복수의지연소자의노드중 하나의노드로부터제3 신호를수신하며, 제1 신호및 제3 신호에대한위상차를출력하는위상주파수검출기, 및, 주파수검출기의출력신호와제2 신호를이용하여, 제1 신호대한제2 신호의주파수에러를디지털코드로출력하는주파수검출기를포함한다. 이에따라, 본타임투디지털컨버터는입력되는두 신호간의위상차이뿐만아니라주파수차이까지검출할수 있다.
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公开(公告)号：KR1020140100673A
公开(公告)日：2014-08-18
申请号：KR1020130013653
申请日：2013-02-07
Applicant: 서울대학교산학협력단
IPC: H05B37/02
CPC classification number: H05B33/0827 , H05B33/083 , H02M3/1582 , H05B33/0812
Abstract: An apparatus for driving a light emitting device according to an embodiment of the present invention includes: a power supply part for supplying a DC current including a ripple with a constant period; and a light emitting device array. The light emitting device array includes a plurality of unit light emitting device arrays. Each unit light emitting device array includes a light emitting device string; a switch for supplying or blocking the DC current supplied to the light emitting device string from the power supply part; a capacitor for smoothing the DC current supplied by the power supply part; and a control part for controlling the switch to be switched on or off. The control part divides a period of the DC current into m sections where the number ″m″ is relatively prime to the number (n) of the unit light emitting device arrays, and controls the switch so that a DC current of each section is applied to the unit light emitting device arrays in sequence.
Abstract translation: 根据本发明实施例的用于驱动发光器件的装置包括：电源部分，用于提供包括恒定周期的纹波的DC电流; 和发光器件阵列。 发光器件阵列包括多个单位发光器件阵列。 每个单位发光器件阵列包括发光器件串; 用于从供电部分提供或阻挡提供给发光器件串的DC电流的开关; 用于平滑由电源部分提供的DC电流的电容器; 以及用于控制开关被打开或关闭的控制部分。 控制部将直流电流的周期分割为与单位发光元件阵列的数量（n）相对应的数量“m”的m个部分，并且控制开关，使得每个部分的直流电流被施加 依次连接到单元发光器件阵列。
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公开(公告)号：KR101278109B1
公开(公告)日：2013-06-24
申请号：KR1020120041062
申请日：2012-04-19
Applicant: 서울대학교산학협력단
CPC classification number: H03L7/07 , G04F10/005 , H03L7/0991 , H03L2207/50
Abstract: PURPOSE: A digital phase locked loop which has a low long term jitter is provided to reduce power consumption and the size. CONSTITUTION: A first phase locked loop(1) includes a first digital control oscillator(200) in which a frequency of an output signal is controlled according to a first digital control code(M). The first digital control oscillator includes a second phase locked loop(200'). The second phase locked loop receives the first digital control code, controls a dividing ratio about a signal on a feedback path according to the first digital control code, and exists inside of the first phase locked loop. A dividing block(600) divides the output signal of the second phase locked loop and automatically selects a dividing ratio by using a control signal which controls the oscillator of the second phase locked loop. [Reference numerals] (280) DOC block; (600) Dividing block
Abstract translation: 目的：提供具有低长期抖动的数字锁相环，以减少功耗和尺寸。 构成：第一锁相环（1）包括第一数字控制振荡器（200），其中根据第一数字控制码（M）控制输出信号的频率。 第一数字控制振荡器包括第二锁相环（200'）。 第二锁相环接收第一数字控制码，根据第一数字控制码控制反馈路径上的信号的分频比，并且存在于第一锁相环内。 分割块（600）划分第二锁相环的输出信号，并通过使用控制第二锁相环的振荡器的控制信号来自动选择分频比。 （附图标记）（280）DOC块; （600）分隔块
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