公开(公告)号：KR101270174B1

公开(公告)日：2013-05-31

申请号：KR1020070124383

申请日：2007-12-03

Applicant: 삼성전자주식회사

Inventor： 손경석 ,  이상윤 ,  류명관 ,  김태상 ,  권장연 ,  박경배 ,  정지심

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/66969

Abstract: 산화물반도체박막트랜지스터의제조방법이개시된다. 개시된제조방법은기판상에게이트를형성한다음, 이게이트를덮도록기판상에게이트절연막을형성하는단계; 게이트절연막상에산화물반도체로이루어진채널층을형성하는단계; 채널층의양측면상에각각소스및 드레인전극을형성하는단계; 채널층에산소를공급하기위한플라즈마처리공정을수행하는단계; 소스및 드레인전극과, 채널층을덮도록보호막을형성하는단계; 및보호막을형성한다음, 열처리공정을수행하는단계;를포함한다.

公开(公告)号：KR1020110063252A

公开(公告)日：2011-06-10

申请号：KR1020100029352

申请日：2010-03-31

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  이창승 ,  이재철 ,  이상윤 ,  권장연 ,  이광희 ,  손경석

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78606 ,  H01L27/1225 ,  H01L27/1248

Abstract: PURPOSE: A transistor, a method for manufacturing the same, and an electronic device including the transistor are provided to improve the reliability of a flat display apparatus by being adapted to the flat display apparatus. CONSTITUTION: A multi-layered structure includes a silicon oxide layer(10), a silicon oxynitride layer(20), and a silicon nitride layer(30). The silicon oxide layer is capable of being formed at low temperature between 100 and 250 degrees Celsius or at high temperature between 250 and 450 degrees Celsius. The characteristic change of a channel layer(C1) is suppressed by a protective layer(P1). The thicknesses of a gate(G1), the channel layer, a gate insulating layer, a source electrode(S1), a drain electrode(D1), and a protective layer are respectively between 50 and 300nm, between 40 and 100nm, between 50 and 400nm, between 10 and 200nm, between 10 and 200nm, and between 250 and 1200nm.

Abstract translation: 目的：提供晶体管及其制造方法以及包括该晶体管的电子器件，以通过适用于平板显示装置来提高平板显示装置的可靠性。 构成：多层结构包括氧化硅层（10），氧氮化硅层（20）和氮化硅层（30）。 氧化硅层能够在低于100摄氏度至250摄氏度的低温或250至450摄氏度的高温下形成。 通过保护层（P1）抑制沟道层（C1）的特性变化。 栅极（G1），沟道层，栅极绝缘层，源极（S1），漏极（D1）和保护层的厚度分别为50〜300nm，40nm〜100nm，50nm 在400nm和200nm之间，在10nm和200nm之间，在250nm和1200nm之间。

公开(公告)号：KR1020100135544A

公开(公告)日：2010-12-27

申请号：KR1020090053988

申请日：2009-06-17

Applicant: 삼성전자주식회사

Inventor： 정지심 ,  이상윤 ,  이광희 ,  권장연 ,  손경석

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L27/3272 ,  H01L29/78693 ,  G02F1/136209

Abstract: PURPOSE: A transistor, a method for manufacturing the same, and an electronic element including the same are provided to suppress the change of a threshold voltage in the transistor by including a photo relaxation layer. CONSTITUTION: A transistor includes a source, a drain, a channel layer, a gate insulating layer(GI1), and a gate(G1). The channel layer includes an amorphous oxide semiconductor. The amorphous oxide semiconductor is a ZnO-based oxide. A photo relaxation layer(R1) suppresses the change of a threshold voltage in the transistor due to light. The photo relaxation layer is based on Al_2O_3. The gate insulating layer is based on a silicon oxide.

Abstract translation: 目的：提供晶体管及其制造方法以及包括该晶体管的电子元件，以通过包括光弛豫层来抑制晶体管中阈值电压的变化。 构成：晶体管包括源极，漏极，沟道层，栅极绝缘层（GI1）和栅极（G1）。 沟道层包括无定形氧化物半导体。 无定形氧化物半导体是ZnO类氧化物。 光弛豫层（R1）抑制由于光引起的晶体管中的阈值电压的变化。 光致弛豫层基于Al_2O_3。 栅极绝缘层基于氧化硅。

公开(公告)号：KR1020100030995A

公开(公告)日：2010-03-19

申请号：KR1020080090007

申请日：2008-09-11

Applicant: 삼성전자주식회사

Inventor： 박경배 ,  류명관 ,  유병욱 ,  이상윤 ,  김태상 ,  권장연 ,  손경석 ,  정지심

IPC: G02F1/136 ,  H01L29/786

CPC classification number: H01L29/78609 ,  H01L29/78618 ,  H01L29/458

Abstract: PURPOSE: A method for manufacturing a thin film transistor by reducing off current of high drain area is provided. CONSTITUTION: A thin film transistor comprises a gate(11), gate insulation layer(12), channel(13), intermediate layer(14), source and drain(16a,16b). The gate is formed on one are of a substrate. The gate insulation layer is formed on the substrate and gate. The channel is formed on an area corresponding to the gate on the gate insulation layer. The intermediate layer is formed at both upper sides of the channel and on the gate insulation layer.

Abstract translation: 目的：提供一种通过减少高漏区电流来制造薄膜晶体管的方法。 构成：薄膜晶体管包括栅极（11），栅极绝缘层（12），沟道（13），中间层（14），源极和漏极（16a，16b）。 栅极形成在一个基板上。 栅极绝缘层形成在基板和栅极上。 沟道形成在与栅极绝缘层上的栅极对应的区域上。 中间层形成在通道的两个上侧和栅极绝缘层上。

公开(公告)号：KR1020090122727A

公开(公告)日：2009-12-01

申请号：KR1020080048676

申请日：2008-05-26

Applicant: 삼성전자주식회사

Inventor： 류명관 ,  박경배 ,  이상윤 ,  김태상 ,  권장연 ,  유병욱 ,  손경석 ,  정지심

IPC: H01L21/20

CPC classification number: C23C16/45565 ,  C23C16/45551 ,  C23C16/45574

Abstract: PURPOSE: An atomic layer deposition apparatus and an atomic layer deposition method using the same are provided to rapidly deposit a film of desired thickness on a substrate by injecting a first source gas, a first purge gas, a second source gas, and a second purge gas at the same time while the substrate or a shower head is moved. CONSTITUTION: A substrate supporting bar(120) is installed inside a reaction chamber, and supports a substrate(10). A shower head(130) includes a nozzle set capable of injecting a first source gas, a second source gas, and a purge gas on the substrate at the same time. At least one among the substrate supporting bar and the shower head is movably installed according to a first direction. A first source gas injection nozzle(31) is arranged in a first row. A purge gas injection nozzle(41,42) is arranged in a second row. A second source gas injection nozzle(32) is arranged in a third row.

Abstract translation: 目的：提供一种原子层沉积装置和使用其的原子层沉积方法，以通过注入第一源气体，第一吹扫气体，第二源气体和第二吹扫来快速沉积在衬底上的所需厚度的膜 同时在衬底或淋浴头移动的同时气体。 构成：衬底支撑杆（120）安装在反应室内，并支撑衬底（10）。 淋浴头（130）包括能够同时在基板上喷射第一源气体，第二源气体和吹扫气体的喷嘴组。 基板支撑杆和淋浴头中的至少一个根据第一方向可移动地安装。 第一源气体喷射喷嘴（31）布置在第一排中。 吹扫气体注入喷嘴（41,42）布置在第二排中。 第二源气体喷射喷嘴（32）布置在第三排中。

公开(公告)号：KR1020090121711A

公开(公告)日：2009-11-26

申请号：KR1020080047743

申请日：2008-05-22

Applicant: 삼성전자주식회사

Inventor： 권장연 ,  이상윤 ,  류명관 ,  김태상 ,  박경배 ,  유병욱 ,  손경석 ,  정지심

IPC: G02F1/1335 ,  G02F1/13

CPC classification number: G02F1/133305 ,  G09F9/35

Abstract: PURPOSE: A display device and a manufacturing method thereof for improving the real feeling and immersion are provided to improve the image quality by changing FOV within a predetermined range. CONSTITUTION: A display device includes a flexible base(10) and a hard base(30). An image display structure(20) is formed on a second surface of the flexible base. The hard base comprises a plurality of pieces. A plurality of pieces is closely fixed to the flexible base. The flexible base is bend in a direction of the image display structure. The image display structure is roundly changed. The reality is improved by increase of FOV(Field Of View) by bending of the display device.

Abstract translation: 目的：提供一种用于改善真实感和浸没的显示装置及其制造方法，以通过在预定范围内改变FOV来改善图像质量。 构成：显示装置包括柔性基座（10）和硬质基座（30）。 图像显示结构（20）形成在柔性基底的第二表面上。 硬底包括多个片。 多个件紧密地固定在柔性基座上。 柔性基座在图像显示结构的方向上弯曲。 图像显示结构被彻底改变。 通过显示装置的弯曲增加FOV（视场）来改善现实。

公开(公告)号：KR1020090084642A

公开(公告)日：2009-08-05

申请号：KR1020080099608

申请日：2008-10-10

Applicant: 삼성전자주식회사

Inventor： 손경석 ,  김태상 ,  권장연 ,  정지심 ,  이상윤 ,  류명관 ,  박경배 ,  유병욱

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/51 ,  H01L29/66969 ,  H01L29/78648

Abstract: An oxide semiconductor transistor and a manufacturing method thereof are provided to increase the driving current by forming gates at the upper and lower parts of channel layer. A channel layer(116) is made of an oxide semiconductor. The first gate insulating layer(110) is formed between the channel layer and the first gate(112). The second gate insulating layer(120) is formed between the channel layer and the second gate(122). The first gate insulating layer and the second gate insulating layer are made of the different material. The first gate insulating layer is made of the material not including the oxygen. The second gate insulating layer is made of the material including the oxygen.

Abstract translation: 提供一种氧化物半导体晶体管及其制造方法，通过在沟道层的上部和下部形成栅极来增加驱动电流。 沟道层（116）由氧化物半导体构成。 第一栅极绝缘层（110）形成在沟道层和第一栅极（112）之间。 第二栅极绝缘层（120）形成在沟道层和第二栅极（122）之间。 第一栅极绝缘层和第二栅极绝缘层由不同的材料制成。 第一栅绝缘层由不包括氧的材料制成。 第二栅绝缘层由包括氧的材料制成。

公开(公告)号：KR1020090057689A

公开(公告)日：2009-06-08

申请号：KR1020070124382

申请日：2007-12-03

Applicant: 삼성전자주식회사

Inventor： 손경석 ,  이상윤 ,  류명관 ,  김태상 ,  권장연 ,  박경배 ,  정지심

IPC: G02F1/136 ,  H01L29/786

CPC classification number: G02F1/136213 ,  G02F2203/01 ,  H01L29/7869

Abstract: A display device using an oxide semiconductor thin film transistor is provided to have at least one storage capacitor. A display device using an oxide semiconductor thin film transistor includes a storage electrode(120) and a pixel electrode(130). At least one thin film transistor and at least one storage capacitor are prepared. The storage capacitor of the storage electrode is made of transparent oxide semiconductors, and the pixel electrode is spaced from the storage electrode at a certain interval.

Abstract translation: 提供使用氧化物半导体薄膜晶体管的显示装置具有至少一个存储电容器。 使用氧化物半导体薄膜晶体管的显示装置包括存储电极（120）和像素电极（130）。 制备至少一个薄膜晶体管和至少一个存储电容器。 存储电极的存储电容器由透明氧化物半导体制成，并且像素电极以一定间隔与存储电极间隔开。

公开(公告)号：KR1020080112091A

公开(公告)日：2008-12-24

申请号：KR1020080019304

申请日：2008-02-29

Applicant: 삼성전자주식회사

Inventor： 류명관 ,  이상윤 ,  이제훈 ,  김태상 ,  권장연 ,  박경배 ,  손경석 ,  정지심

IPC: G02F1/136

CPC classification number: G02F1/136 ,  H01L21/67075 ,  H01L29/786 ,  H01L29/7869

Abstract: A method for fabricating ZnO family thin film transistor is provided to reduce the damage of plasma and implement a proper electrical characteristic using wet etching method. A gate(20) is formed on a substrate(10). A gate isolation layer(21) is formed on the gate. A ZnO series channel layer(22) is formed on the gate isolation layer. A conductive material for the electrode manufacture is formed. A mask layer has the pattern corresponding to source / drain electrodes(23a,23b) of the channel layer either side of the thin film transistor on the layer of conductive material. The source / drain electrode is formed by etching the domain which is not covered with the mask layer. A passivation layer(25) is formed to cover the source / drain electrode and channel layer.

Abstract translation: 提供一种制造ZnO族薄膜晶体管的方法，以减少等离子体的损伤，并使用湿式蚀刻方法实现适当的电气特性。 在基板（10）上形成栅极（20）。 栅极隔离层（21）形成在栅极上。 在栅极隔离层上形成ZnO系沟道层（22）。 形成用于电极制造的导电材料。 掩模层具有与导电材料层上的薄膜晶体管的任一侧的沟道层的源极/漏极（23a，23b）对应的图案。 源极/漏极通过蚀刻未被掩模层覆盖的畴来形成。 形成钝化层（25）以覆盖源/漏电极和沟道层。

公开(公告)号：KR1020080104588A

公开(公告)日：2008-12-03

申请号：KR1020070051560

申请日：2007-05-28

Applicant: 삼성전자주식회사

Inventor： 손경석 ,  이상윤 ,  류명관 ,  김태상 ,  권장연 ,  박경배 ,  정지심

IPC: H01L29/786

CPC classification number: H01L29/7869 ,  H01L29/78696

Abstract: The method of manufacturing the ZnO system thin film transistor is provided to obtain the GIZO thin film transistor by adjusting the proper carrier concentration. The manufacturing method of the ZnO system thin film transistor comprises as follows. A step is for forming the ZnO system channel layer in the substrate(10). The step is for forming the oxide layer including the oxygen of the imperfect combination state on the channel layer. A step is for doing with the annealing on the channel layer(22) and oxide layer. In the annealing step, the oxygen of the oxide layer is provided to the channel layer and the carrier concentration of the channel layer is reduced by the interfacial reaction between the oxide layer and the channel layer.

Abstract translation: 提供制造ZnO系薄膜晶体管的方法，通过调整适当的载流子浓度来获得GIZO薄膜晶体管。 ZnO系薄膜晶体管的制造方法如下。 步骤是在衬底（10）中形成ZnO系沟道层。 该步骤用于在通道层上形成包括不完美组合状态的氧的氧化物层。 步骤是在沟道层（22）和氧化物层上进行退火。 在退火步骤中，氧化物层的氧被提供给沟道层，沟道层的载流子浓度由于氧化物层和沟道层之间的界面反应而降低。