Abstract:
A proximity query operation accelerating system according to the present invention comprises: a plurality of operation devices; a scheduler for distributing tasks to the operation devices; and a data communications interface for performing data communications between the operation devices and the scheduler, wherein the scheduler distributes the tasks based on a task-operation device performance relation model which estimates the time needed when the operation devices process the tasks.
Abstract:
The present invention relates to a method for reducing the power consumption of a bufferless on-chip network and a device thereof. The provided credit flow control method includes: a step where a memory access request occurs in a core; a step where input of a memory access request is restricted until credit becomes available; and a step where a memory access request is inputted into a memory control device in an on-chip network when the credit becomes available. [Reference numerals] (AA) Start; (BB) End; (S210) Step where a memory access request occurs; (S220) Step where input of a memory access request is restricted; (S230) Step where a memory access request is inputted into a memory control device in an on-chip network
Abstract:
온-칩 네트워크에서 토러스 토폴로지를 이용한 라우팅 시스템 및 라우팅 방법이 개시된다. 복수의 링 네트워크를 이용하여 2차원 구조로 각각 형성된 데이터 네트워크(data network) 및 토큰 네트워크(token network)를 병렬 형태로 포함하는 토러스(torus) 네트워크상에서, 패킷을 전송하는 라우팅 시스템은, 데이터 네트워크를 통해 이전 라우터로부터 수신되는 패킷의 플릿(flit)을 버퍼에 저장하는 저장 관리부, 토큰 네트워크를 형성하는 링 네트워크들 각각에 우선순위토큰 중 해당하는 링 네트워크상에서 전송되는 우선순위토큰들을 수신하는 우선순위토큰 수신부, 수신된 우선순위토큰을 이용하여 포착토큰을 생성하거나 또는 이전 라우터로부터 토큰 네트워크를 통해 포착토큰을 수신하는 포착토큰 관리부, 버퍼의 헤드부분에 저장된 플릿의 목적지 라우터를 확인하는 목적지 라우터 확인부, 목적지 라우터에 포함된 버퍼의 상태에 따라 생성 또는 수신된 포착토큰을 토큰 네트워크를 통해 목적지 라우터로 전송하거나 또는 제거하는 포착토큰 처리부 및 생성 또는 수신된 포착토큰이 목적지 라우터로 전송되고 전송된 포착토큰이 다시 수신되는 경우, 토러스 네트워크에 교착상태가 발생하였음을 확인하는 교착상태 발생 확인부를 포함한다.
Abstract:
PURPOSE: A routing system for reducing leaked power, a flow control method, a buffer management system, and a buffer management method thereof are provided to reduce leaked power by individually deactivating buffer entries including the buffer of a router on an on-chip network. CONSTITUTION: A buffer entry state management unit(1210) manages a plurality of buffer entries as an on state or an off state. A fleet data management unit(1220) stores one of the buffer entries from an upstream router. The fleet data management unit transmits the stored fleet data to a downstream router. A credit transmission unit(1230) transmits an initial credit and a normal credit to the upstream router. The initial credit is matched with the fleet data received from the upstream router. The normal credit is matched with the fleet data transmitted to the downstream router. [Reference numerals] (1210) Buffer entry state management unit; (1220) Fleet data management unit; (1230) Credit transmission unit; (1240) Credit number management unit; (1250) Congestion signal generation unit; (1260) Congestion signal transmission unit; (1270) Congestion detecting unit
Abstract:
PURPOSE: A mixed network based multi-core processor is provided to divide and design a network depending on the traffic pattern, thereby minimizing power and area costs. CONSTITUTION: Nodes include a processing core or a memory. A first network(110) based on packet switching connects the nodes. A second network(120) based on circuit switching connects the nodes. The first network or the second network is selectively used depending on the traffic pattern. The traffic pattern is defined based on the number of source nodes and the number of destination nodes. [Reference numerals] (110) First network; (120) Second network;