CIRCUIT EMPLOYING INTERCOUPLED STATE MACHINES FOR TRANSMITTING AND RECEIVING MULTIFORMATTED SEQUENCES OF VOICE AND DATA CHARACTERS
    31.
    发明申请
    CIRCUIT EMPLOYING INTERCOUPLED STATE MACHINES FOR TRANSMITTING AND RECEIVING MULTIFORMATTED SEQUENCES OF VOICE AND DATA CHARACTERS 审中-公开
    采用语音和数据字符传输和接收多路复用序列的交互状态机的电路

    公开(公告)号:WO1987000371A1

    公开(公告)日:1987-01-15

    申请号:PCT/US1986001325

    申请日:1986-06-20

    CPC classification number: H04L12/64 H04L12/433

    Abstract: A circuit which operates on input signals (INSIG) representing multiformatted sequences of idle characters, voice characters, and data characters comprises: a first state machine (10) consisting essentially of a logic array (12), a register (11), and a counter (11b). One section of the register (11c) is coupled to receive the input signals and another section of the register (11a, 11d) together with the counter is coupled to receive respective signals from the logic array. The logic array has input terminals (Io-I19) coupled to receive signals from the register and the counter, and in response, generate control (C4) signals indicating in which format and which location therein each character is being received. Second (20), third (30), and fourth (40) state machines are coupled to receive respective subsets (C4b, C4c, C4d) control signals from the said first state machine. The second, third, and fourth state machines are adapted to perform transmit and receive operations on the voice and data characters in response to the subset of control signals it receives; and each subset of the control signals is smaller in number than the input terminals of the logic array.

    PRINTER-TAPE DATA LINK PROCESSOR
    33.
    发明申请
    PRINTER-TAPE DATA LINK PROCESSOR 审中-公开
    打印机数据链接处理器

    公开(公告)号:WO1986004169A1

    公开(公告)日:1986-07-17

    申请号:PCT/US1986000009

    申请日:1986-01-06

    CPC classification number: G06F13/124

    Abstract: A peripheral controller (data link processor) controls data transfers between a host computer and a plurality of tape peripheral units and a single printer peripheral unit. A master microprocessor commands three subordinate controllers to permit concurrent data transfers through a buffer memory in both the Read and the Write directions. A dual channel control from the master microprocessor actuates a DMA switch so that data transfers to/from the tape units can be controlled by switching on alternate control lines which regulate the data transfer operations.

    ELECTROMAGNETIC INTERFERENCE SUPRESSION FOR ELECTRICAL DISCHARGE PRINTERS
    35.
    发明申请
    ELECTROMAGNETIC INTERFERENCE SUPRESSION FOR ELECTRICAL DISCHARGE PRINTERS 审中-公开
    电动打印机的电磁干扰抑制

    公开(公告)号:WO1985004006A1

    公开(公告)日:1985-09-12

    申请号:PCT/US1985000320

    申请日:1985-02-27

    CPC classification number: B41J2/425 H04B15/02 Y10T428/24917

    Abstract: Styluses (14) are scanned across the width of a roll of electrosensitive paper (10) and are selectively energized to vaporize small area on the paper's coating (13) to thereby form characters (26). When the coating vaporizes, a spark is produced which generates a broad band of electromagnetic energy which is conducted into the environment due to the conductive coating of the paper acting as an antenna. In the present system isolation bands (24) are produced by continuously energizing all styluses as they scan across the full width of the paper, thereby causing an entire band of the paper's conductive coating to be burned off across the entire width of the paper. Each isolation band severs the conductive surface of the paper, thereby reducing the effective length and/or propagation capability of the antenna created by the printed paper and lowering the level of radiated energy.

    METHOD OF EFFICIENTLY AND SIMULTANEOUSLY TRANSMITTING BOTH ISOCHRONOUS AND NONISOCHRONOUS DATA IN A COMPUTER NETWORK
    36.
    发明申请
    METHOD OF EFFICIENTLY AND SIMULTANEOUSLY TRANSMITTING BOTH ISOCHRONOUS AND NONISOCHRONOUS DATA IN A COMPUTER NETWORK 审中-公开
    在计算机网络中有效和同时传输两个异步数据和非重要数据的方法

    公开(公告)号:WO1985003827A1

    公开(公告)日:1985-08-29

    申请号:PCT/US1985000243

    申请日:1985-02-15

    CPC classification number: H04L12/433 H04L12/64

    Abstract: A method of transmitting isochronous and nonisochronous data through a computer network (10) in which a plurality of station (S1 to S6 and RT) have respective input (11) and output (12) ports that are serially coupled together to form a loop includes the steps of: transmitting data characters of a nonisochronous frame from a first station in the loop; passing the data characters from the first station through a second station in the loop but with a pair of control characters inserted between any two data characters indicating the beginning and end of an isochronous frame within the nonisochronous frame; passing the data characters and control characters from the second station through a third station on the loop but with another internally generated isochronous data character inserted between the control characters; temporarily stopping the transmitting step in the first station in response to the receipt of at least one of the control characters to pass the isochronous frame through the first station; and proceding in the first station with the transmitting of the nonisochronous frame after passing the isochronous frame.

    SOCKET, FOR AN INTEGRATED CIRCUIT PACKAGE, INCORPORATING SERIALLY COUPLED SPRINGS
    37.
    发明申请
    SOCKET, FOR AN INTEGRATED CIRCUIT PACKAGE, INCORPORATING SERIALLY COUPLED SPRINGS 审中-公开
    插座,用于集成电路封装,并联连接的联轴器

    公开(公告)号:WO1985002501A1

    公开(公告)日:1985-06-06

    申请号:PCT/US1984001922

    申请日:1984-11-21

    CPC classification number: H05K7/1007 H01R13/193

    Abstract: A socket for an integrated circuit package comprises a frame (11); a plurality of mechanical contacts (15) mounted in the frame such that they align with corresponding pins on the package; a contact deflecting member (14) in the frame which is moved to engage and deflect the contacts against the pins; an actuator (16) in the frame which is manually moved to engage and move the contact deflecting member; and a spring (17) in the frame which engages and is deflected by the actuator when the actuator moves the contact deflecting member; the spring being mounted to deflect in series with the contacts to enable the socket components to have dimensional tolerances and yet avoid the overstressing and understressing of the contacts by the contact deflecting member.

    IMPROVED OVERCOAT FOR OPTICAL RECORDING MEDIA
    38.
    发明申请
    IMPROVED OVERCOAT FOR OPTICAL RECORDING MEDIA 审中-公开
    改进光学记录介质的过滤器

    公开(公告)号:WO1985001227A1

    公开(公告)日:1985-03-28

    申请号:PCT/US1984001499

    申请日:1984-09-19

    CPC classification number: G11B7/2542 G11B7/252 G11B7/2595

    Abstract: Protective overcoatings for an information storage record which includes an information-layer adapted for optical data recording. The protective overcoatings are transparent to recording radiation and especially adapted to enhance service life and recording characteristics. A typical coating comprises the polymerization product of a formulation including at least one radiation-cured "bulk resin" (e.g., an acrylamide or an acrylate monomer or pre-polymer), plus an associated non-yellowing photo-initiator, a non-yellowing adhesion-promoter and related coating-constituents. Once applied, this coating is cured by exposure to UV radiation such as to cure it without heating it significantly so that said radiation functions as the sole or principal polymerizing agent, acting quickly, and with little or no supplemental heat, and without extended "tackiness". This formulation will readily "level" to render the desired coating to serve as a mechanical/chemical barrier.

    PRINTED CIRCUIT BOARD MAXIMIZING AREAS FOR COMPONENT UTILIZATION
    39.
    发明申请
    PRINTED CIRCUIT BOARD MAXIMIZING AREAS FOR COMPONENT UTILIZATION 审中-公开
    印刷电路板最大限度地利用组件使用领域

    公开(公告)号:WO1985001156A1

    公开(公告)日:1985-03-14

    申请号:PCT/US1984001388

    申请日:1984-08-30

    Abstract: A multilayer printed circuit board (10) for TTL logic components provides an approximate 100 ohm characteristics impedance between external microstrip signal lines (11, 16) and internal ground (13) and voltage (14) planes. The addition of two internal microstrip signal plane lines (12, 15) permits a much greater interconnectability capability and also saves a large percentage of spatial area for component mounting while still maintaining the 100 ohm impedance characteristics.

    Abstract translation: 用于TTL逻辑元件的多层印刷电路板(10)在外部微带线信号线(11,16)和内部接地(13)和电压(14)面之间提供近似100欧姆的特性阻抗。 添加两个内部微带线信号平面线(12,15)允许更大的互连能力,并且还可以节省用于部件安装的大部分空间面积,同时仍然保持100欧姆的阻抗特性。

    BUBBLE MEMORY WHICH TRANSFERS BUBBLES IN BOTH RIGHT-TO-LEFT AND LEFT-TO-RIGHT SPS LOOPS TO PROVIDE A SHORT ACCESS TIME
    40.
    发明申请
    BUBBLE MEMORY WHICH TRANSFERS BUBBLES IN BOTH RIGHT-TO-LEFT AND LEFT-TO-RIGHT SPS LOOPS TO PROVIDE A SHORT ACCESS TIME 审中-公开
    在双向向右和向右移动SPS插座的泡沫转移泡沫存储器以提供短时间访问时间

    公开(公告)号:WO1985000244A1

    公开(公告)日:1985-01-17

    申请号:PCT/US1984000995

    申请日:1984-06-27

    CPC classification number: G11C19/0866 G11C19/0875

    Abstract: A bubble memory comprises a substrate (30) with a major surface; a first storage loop (31) for storing bubbles on the left side of the surface having parallel inputs and parallel outputs; a second storage loop (32) for storing bubbles on the right side of the surface having parallel inputs and parallel outputs; a first input generator (33) on the left side of the surface including a serial-parallel track (34) along which the bubbles move to the right to enter the parallel inputs of the first storage loop; a second input generator (35) on the right side of the surface including a serial-parallel track (36) along which the bubbles move to the left to enter the parallel inputs of the second storage loop; a detector (38) for detecting bubbles disposed equally on the left side and the right side of the surface; a first output mechanism (37) on the left side of the surface including a parallel-serial track which receives bubbles from the parallel outputs of the first storage loop and moves them to the right to the detector; and a second output mechanism (39) on the right side of the surface including a parallel-serial track which receives bubbles from the parallel outputs of the second storage loop and moves them to the left to the detector.

Patent Agency Ranking