31.
    发明专利
    未知

    公开(公告)号:FR2690802B1

    公开(公告)日:1994-08-19

    申请号:FR9205299

    申请日:1992-04-29

    Applicant: CIT ALCATEL

    Abstract: This device includes essentially: - two attachment ports (R1,R2) for the said optical link termed first and second attachment ports, - three supports, termed first, second and fourth support (S1,S2,S4) which are able to support means of optoelectronic conversion termed first, second and third means of optoelectronic conversion respectively, - two supports, termed third and fifth support (S3,S5), able to support beam routing means termed first and second beam routing means respectively, these elements being located within the same structure (S) and being arranged with respect to one another in such a way as to permit optical transmission between the said first attachment port R1 and the said first beam routing means, between each of the said first and second optoelectronic conversion means and the said first beam routing means, between the said second port R2 and the said second beam routing means, between each of the two routing means and between the said third means of optoelectronic conversion and the second routing means, thus defining optical transmission paths termed first, second, third, fifth, sixth, seventh path (V1,V2,V3,V5,V6,V7) respectively, inside the said structure.

    32.
    发明专利
    未知

    公开(公告)号:DE3875156D1

    公开(公告)日:1992-11-12

    申请号:DE3875156

    申请日:1988-04-15

    Applicant: CIT ALCATEL

    Inventor: MARCEL FRANCOIS

    Abstract: This power supply is intended, more particularly, for powering a user digital terminal from a remote terminal in an integrated service digital telephone network. It comprises a main D.C. electricity power source (10) provided with a protection device (11) causing its output to go to a high impedance state in the absence of a voltage across its terminals, and an auxiliary D.C. electricity power source (20) connected in parallel and in opposition with the main source (10) and provided with a current limiting device (20) which is normally tripped by the additional current which the main source (10) attempts to impose thereon.

    33.
    发明专利
    未知

    公开(公告)号:FR2614737B1

    公开(公告)日:1989-06-09

    申请号:FR8706078

    申请日:1987-04-29

    Applicant: CIT ALCATEL

    Inventor: MARCEL FRANCOIS

    Abstract: This power supply is intended, more particularly, for powering a user digital terminal from a remote terminal in an integrated service digital telephone network. It comprises a main D.C. electricity power source (10) provided with a protection device (11) causing its output to go to a high impedance state in the absence of a voltage across its terminals, and an auxiliary D.C. electricity power source (20) connected in parallel and in opposition with the main source (10) and provided with a current limiting device (20) which is normally tripped by the additional current which the main source (10) attempts to impose thereon.

    34.
    发明专利
    未知

    公开(公告)号:FR2614737A1

    公开(公告)日:1988-11-04

    申请号:FR8706078

    申请日:1987-04-29

    Applicant: CIT ALCATEL

    Inventor: MARCEL FRANCOIS

    Abstract: This power supply is intended, more particularly, for powering a user digital terminal from a remote terminal in an integrated service digital telephone network. It comprises a main D.C. electricity power source (10) provided with a protection device (11) causing its output to go to a high impedance state in the absence of a voltage across its terminals, and an auxiliary D.C. electricity power source (20) connected in parallel and in opposition with the main source (10) and provided with a current limiting device (20) which is normally tripped by the additional current which the main source (10) attempts to impose thereon.

    CLOCK RECOVERY CIRCUIT FOR A SYNCHRONOUS DATA TRANSMISSION UTILIZING A COMBINATION OF THE BIPHASE L CODE, AND THE MODIFIED BIPHASE CODE

    公开(公告)号:DE3462741D1

    公开(公告)日:1987-04-23

    申请号:DE3462741

    申请日:1984-03-05

    Applicant: CIT ALCATEL

    Abstract: A timing recovery circuit for synchronous data transmission using a signal which, in the baseband, is formed by a succession of two-level signal elements, without overlap, and of duration T, able to take one of the four forms defined by the functions: comprises a transition selection circuit. This circuit selects transitions in the received signal, in the baseband, separated from those which immediately precede them by a time-delay situated in an arbitrary range. This range brackets a symbol duration of between 3/4 and 5/4 times, exclusive, the duration of a signal element. A timebase which is synchronized on the transitions selected by the selection circuit delivers the signal element recovered timing.

    CIRCUIT DE RECUPERATION DU RYTHME D'UNE TRANSMISSION SYNCHRONE DE DONNEES

    公开(公告)号:CA1208312A

    公开(公告)日:1986-07-22

    申请号:CA449285

    申请日:1984-03-09

    Applicant: CIT ALCATEL

    Abstract: La présente invention concerne les transmissions de données utilisant un signal qui, en bande de base, est formé d'une succession d'éléments de signal à deux niveaux, sans recouvrement, isochrones, de durée T pouvant prendre l'une des quatre formes définies par les fonctions ? signe (sin ) ; ? signe (cos ). Elle a pour objet un circuit de récupération de rythme qui comporte un circuit de sélection de transitions triant, parmi les transitions du signal reçu en bande de base, les transitions séparées de celles qui les précèdent immédiatement de la durée d'un élément de signal et une base de temps qui est synchronisée sur les transitions triées par le circuit de sélection et qui délivre le rythme récupéré des éléments de signal.

    37.
    发明专利
    未知

    公开(公告)号:DE2361843A1

    公开(公告)日:1974-06-20

    申请号:DE2361843

    申请日:1973-12-12

    Applicant: CIT ALCATEL

    Abstract: Decoder having modular constitution for transmission by coded pulses constituted by several identical individual modules wired up and interconnected so as to perform, in interrelation, various elementary functions of the decoding. Each of the individual modules comprises four operational amplifiers, an output amplifier, a switching device selectively connecting the output of one operational amplifier to the input of the output amplifier, and a logic control circuit responsive to coded bits to actuate the switching device.

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