公开(公告)号：US11935928B2

公开(公告)日：2024-03-19

申请号：US17747476

申请日：2022-05-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Hong Yu ,  Jianwei Peng ,  Vibhor Jain

IPC: H01L29/417 ,  H01L29/08 ,  H01L29/10 ,  H01L29/423 ,  H01L29/66 ,  H01L29/737

CPC classification number: H01L29/41708 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/42304 ,  H01L29/66242 ,  H01L29/7371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a bipolar transistor with self-aligned asymmetric spacer and methods of manufacture. The structure includes: a base formed on a semiconductor substrate; an asymmetrical spacer surrounding the base; an emitter on a first side of the base and separated from the base by the asymmetrical spacer; and a collector on a second side of the base and separated from the base by the asymmetrical spacer.

公开(公告)号：US20240088272A1

公开(公告)日：2024-03-14

申请号：US17931938

申请日：2022-09-14

Applicant: GlobalFoundries U.S. Inc.

Inventor： Shesh Mani Pandey ,  Vibhor Jain

IPC: H01L29/735 ,  H01L29/08 ,  H01L29/10 ,  H01L29/66

CPC classification number: H01L29/735 ,  H01L29/0808 ,  H01L29/0821 ,  H01L29/1008 ,  H01L29/6625

Abstract: Embodiments of the disclosure provide a bipolar transistor and gate structure on a semiconductor fin and methods to form the same. A structure according to the disclosure includes a semiconductor fin including an intrinsic base region and an extrinsic base region adjacent the intrinsic base region along a length of the semiconductor fin. Sidewalls of the intrinsic base region of the semiconductor fin are adjacent an emitter and a collector along a width of the semiconductor fin. A gate structure is on the semiconductor fin and between the intrinsic base region and the extrinsic base region.

公开(公告)号：US11901304B2

公开(公告)日：2024-02-13

申请号：US17323423

申请日：2021-05-18

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Sunil K. Singh ,  Vibhor Jain ,  Siva P. Adusumilli ,  Sebastian T. Ventrone ,  Johnatan A. Kantarovsky ,  Yves T. Ngu

IPC: H01L23/544 ,  H01L23/48 ,  H01L23/00

CPC classification number: H01L23/544 ,  H01L23/481 ,  H01L23/57 ,  H01L23/573 ,  H01L2223/5442 ,  H01L2223/54433

Abstract: The disclosure provides an integrated circuit (IC) structure with fluorescent materials, and related methods. An IC structure according to the disclosure may include a layer of fluorescent material on an IC component. The layer of fluorescent material defines a portion of an identification marker for the IC structure.

公开(公告)号：US20240021713A1

公开(公告)日：2024-01-18

申请号：US18373598

申请日：2023-09-27

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Haiting Wang ,  Alexander Derrickson ,  Jagar Singh ,  Vibhor Jain ,  Andreas Knorr ,  Alexander Martin ,  Judson R. Holt ,  Zhenyu Hu

IPC: H01L29/735 ,  H01L29/66 ,  H01L29/737 ,  H01L29/08 ,  H01L29/417

CPC classification number: H01L29/735 ,  H01L29/6625 ,  H01L29/737 ,  H01L29/0808 ,  H01L29/41708 ,  H01L29/0821

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a lateral bipolar transistor and methods of manufacture. A structure includes: an intrinsic base comprising semiconductor material in a channel region of a semiconductor substrate; an extrinsic base vertically above the intrinsic base; a raised collector region on the semiconductor substrate and laterally connected to the intrinsic base; and a raised emitter region on the semiconductor substate and laterally connected to the intrinsic base.

公开(公告)号：US11869958B2

公开(公告)日：2024-01-09

申请号：US17745280

申请日：2022-05-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Judson R. Holt ,  Shesh Mani Pandey ,  Vibhor Jain

IPC: H01L29/737 ,  H01L29/66 ,  H01L29/08 ,  H01L29/10

CPC classification number: H01L29/7371 ,  H01L29/0804 ,  H01L29/0821 ,  H01L29/1004 ,  H01L29/66242

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors and methods of manufacture. The structure includes: a collector in a semiconductor substrate; a subcollector in the semiconductor substrate; an intrinsic base over the subcollector; an extrinsic base adjacent to the intrinsic base; an emitter over the intrinsic base; and an isolation structure between the extrinsic base and the emitter and which overlaps the subcollector.

公开(公告)号：US11848192B2

公开(公告)日：2023-12-19

申请号：US17124012

申请日：2020-12-16

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Anthony K. Stamper ,  Steven M. Shank ,  John J. Pekarik

IPC: H01L29/737 ,  H01L29/06

CPC classification number: H01L29/7373 ,  H01L29/0649 ,  H01L29/7371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor having an emitter base junction with a silicon-oxygen lattice interface and methods of manufacture. The device includes: a collector region buried in a substrate; shallow trench isolation regions, which isolate the collector region buried in the substrate; a base region on the substrate and over the collector region; an emitter region composed of a single crystalline of semiconductor material and located over with the base region; and an oxide interface at a junction of the emitter region and the base region.

公开(公告)号：US11791334B2

公开(公告)日：2023-10-17

申请号：US17075056

申请日：2020-10-20

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  John J. Ellis-Monaghan ,  Anthony K. Stamper ,  Steven M. Shank ,  John J. Pekarik

IPC: H01L27/08 ,  H01L27/082 ,  H01L27/06 ,  H01L29/737 ,  H01L29/06

CPC classification number: H01L27/082 ,  H01L27/0647 ,  H01L29/0646 ,  H01L29/737

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to heterojunction bipolar transistors (HBTs) with a buried trap rich isolation region and methods of manufacture. The structure includes: a first heterojunction bipolar transistor; a second heterojunction bipolar transistor; and a trap rich isolation region embedded within a substrate underneath both the first heterojunction bipolar transistor and the second heterojunction bipolar transistor.

公开(公告)号：US20230261062A1

公开(公告)日：2023-08-17

申请号：US17671879

申请日：2022-02-15

Applicant: GlobalFoundries U.S. Inc.

Inventor： Uppili Raghunathan ,  Vibhor Jain ,  Sebastian Ventrone ,  Johnatan Kantarovsky ,  Yves Ngu

IPC: H01L29/40 ,  H01L29/735 ,  H01L29/06 ,  H01L29/423

CPC classification number: H01L29/407 ,  H01L29/735 ,  H01L29/0646 ,  H01L29/423 ,  H01L29/401

Abstract: Structures with an isolation region and fabrication methods for a structure having an isolation region. The structure includes a semiconductor substrate, a first isolation region surrounding a portion of the semiconductor substrate, a device in the portion of the semiconductor substrate, and a second isolation region surrounding the first isolation region and the portion of the semiconductor substrate.

公开(公告)号：US11646348B2

公开(公告)日：2023-05-09

申请号：US17473164

申请日：2021-09-13

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： John J. Pekarik ,  Vibhor Jain

IPC: H01L29/10 ,  H01L29/66 ,  H01L29/08 ,  H01L29/737

CPC classification number: H01L29/1004 ,  H01L29/0817 ,  H01L29/66242 ,  H01L29/7371

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a heterojunction bipolar transistor and methods of manufacture. The structure includes: a sub-collector region; a collector region above the sub-collector region; an intrinsic base region composed of intrinsic base material located above the collector region; an emitter located above and separated from the intrinsic base material; and a raised extrinsic base having a stepped configuration and separated from and self-aligned to the emitter.

公开(公告)号：US11637181B2

公开(公告)日：2023-04-25

申请号：US17509327

申请日：2021-10-25

Applicant: GLOBALFOUNDRIES U.S. Inc.

Inventor： Vibhor Jain ,  Alvin J. Joseph ,  Alexander Derrickson ,  Judson R. Holt ,  John J. Pekarik

IPC: H01L29/08 ,  H01L29/735 ,  H01L29/66 ,  H01L29/417

Abstract: The present disclosure relates to semiconductor structures and, more particularly, to lateral bipolar transistors and methods of manufacture. The structure includes: an extrinsic base comprising semiconductor material; an intrinsic base comprising semiconductor material which is located below the extrinsic base; a polysilicon emitter on a first side of the extrinsic base; a raised collector on a second side of the extrinsic base; and sidewall spacers on the extrinsic base which separate the extrinsic base from the polysilicon emitter and the raised collector.