公开(公告)号：DE69032611T2

公开(公告)日：1999-05-27

申请号：DE69032611

申请日：1990-05-16

Applicant: IBM

Inventor： BAKER ERNEST DYSART ,  DINWIDDIE JOHN MONROE ,  GRICE LONNIE EDWARD ,  JOYCE JAMES MAURICE ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH RUSSELL

IPC: G06F15/16 ,  G06F9/46 ,  G06F11/00 ,  G06F11/16 ,  G06F11/20 ,  G06F12/02 ,  G06F13/368 ,  G06F15/177

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：DE69032631D1

公开(公告)日：1998-10-15

申请号：DE69032631

申请日：1990-05-16

Applicant: IBM

Inventor： DINWIDDIE JOHN MONROE ,  GRICE LONNIE EDWARD ,  JOYCE JAMES MAURICE ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH RUSSELL ,  BAKER ERNEST DYSART

IPC: G06F15/16 ,  G06F12/02 ,  G06F13/38 ,  G06F13/12

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：DE69032608D1

公开(公告)日：1998-10-08

申请号：DE69032608

申请日：1990-05-16

Applicant: IBM

Inventor： DINWIDDIE JOHN MONROE ,  GRICE LONNIE EDWARD ,  JOYCE JAMES MAURICE ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH RUSSELL ,  BAKER ERNEST DYSART

IPC: G06F15/16 ,  G06F9/46 ,  G06F15/17 ,  G06F15/173 ,  G06F15/177

Abstract: The functions of two virtual opening systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：DE69031815T2

公开(公告)日：1998-06-25

申请号：DE69031815

申请日：1990-05-16

Applicant: IBM

Inventor： FREEMAN BOBBY JOE ,  DINWIDDIE JOHN MONROE ,  GRICE LONNIE EDWARD ,  LOFFREDO JOHN MARIO ,  SANDERSON KENNETH RUSSELL ,  SUAREZ GUSTAVO ARMANDO

IPC: G06F15/16 ,  G06F9/46 ,  G06F11/16 ,  G06F15/177 ,  H04L29/00 ,  G06F9/44

Abstract: The functions of two virtual operating systems (e.g. S/370 VM, VSE or IX370 and S/88 OS) are merged into one physical system. Partner pairs of S/88 processors run the S/88 OS and handle the fault tolerant and single system image aspects of the system. One or more partner pairs of S/370 processors are coupled to corresponding S/88 processors directly and through the S/88 bus. Each S/370 processor is allocated form 1 to 16 megabytes of contiguous storage from the S/88 main storage. Each S/370 virtual operating system thinks its memory allocation starts at address 0, and it manages its memory through normal S/370 dynamic memory allocation and paging techniques. The S/370 is limit checked to prevent the S/370 from accessing S/88 memory space. The S/88 Operating System is the master over all system hardware and I/O devices. The S/88 processors across the S/370 address space in direct response to a S/88 application program so that the S/88 may move I/O data into the S/370 I/O buffers and process the S/370 I/O operations. The S/88 and S/370 peer processor pairs to execute their respective Operating Systems in a single system environment without significant rewriting of either operating system. Neither operating system is aware of the other operating system nor the other processor pairs.

公开(公告)号：DE69221341D1

公开(公告)日：1997-09-11

申请号：DE69221341

申请日：1992-01-22

Applicant: IBM

Inventor： DINWIDDIE JOHN MONROE ,  FREEMAN BOBBY JOE ,  MICALLEF THOMAS JOHN ,  SUAREZ GUSTAVO ARMANDO ,  WILKIE BRUCE JAMES

IPC: G09G5/00 ,  G06F3/14 ,  G06T3/00 ,  G09G5/14 ,  H04N5/765

Abstract: A multimedia solution is presented which allows a multimedia architecture to be implemented on an existing computer system. According to the invention, an expansion unit which incorporates a multimedia architecture is provided. The expansion unit is connected to an existing computer system via an expansion slot of an I/O bus of the existing computer as well as via a display device output terminal of the computer. The expansion unit is also connected to a display device. Accordingly, the expansion unit controls the presentation which is provided on the display device.

公开(公告)号：DE69113235T2

公开(公告)日：1996-03-28

申请号：DE69113235

申请日：1991-11-20

Applicant: IBM

Inventor： DINWIDDIE JOHN MONROE ,  FREEMAN BOBBY JOE ,  SUAREZ GUSTAVE ARMANDO ,  WILKIE BRUCE JAMES

IPC: G06F3/14 ,  G06T1/00 ,  G06T3/00 ,  G06T11/80 ,  G09G1/16 ,  G09G5/00 ,  G09G5/14 ,  H04H60/04 ,  H04N5/262

Abstract: An information handling apparatus for transferring and composing image signals including a plurality of media sources configured to provide a corresponding plurality of image signals, a media bus connected to the media sources, and a media control module coupled to the media bus. The media bus allows selective access for the plurality of image signals. The selective access enables composition of the independent image signals in response to control information. The media control module receives a composed image signal from the media bus and to provides the composed image signal to a display device.

公开(公告)号：IT1160420B

公开(公告)日：1987-03-11

申请号：IT2265680

申请日：1980-06-09

Applicant: IBM

Inventor： DINWIDDIE JOHN MONROE ,  FREEMAN BODDY JOE ,  JACKSON TIMOTHY ,  ZIPOY WILLIAM LEWIS

IPC: G06F20060101 ,  G06F

Abstract: The input/output controller includes a microprocessor for supervising data transfer between a host processor and the controller and a microprocessor I/O bus coupled to I/O units. A storage unit is located in the I/O controller for providing a data transfer interface between the microprocessor I/O bus and the I/O channel bus of the host processor. First storage accessing circuitry including the microprocessor and chip select decoder provides a data transfer path between a dual-port random access storage mechanism and an I/O unit. Second storage accessing circuitry including a direct memory access controller unit and chip select decoder supplies host processor main storage addresses to the host processor and controller storage addresses to the storage mechanism. These addresses enable transfer of data between the host processor main storage unit and the controller storage mechanism in a first data transfer mode e.g. a cycle steal mode.. More efficient and flexible data transfer are achieved where several I/O units are connected to the I/O controller. So that a high performance I/O controller is provided which is flexible and versatile in terms of the kinds and numbers of tasks it can perform and I/O units it can handle.