公开(公告)号：AU2006326213A1

公开(公告)日：2007-06-21

申请号：AU2006326213

申请日：2006-10-16

Applicant: IBM

Inventor： BAUCHOT FREDERIC ,  CLEMENT JEAN-YVES ,  SECONDO PIERRE ,  MARMIGERE GERARD

IPC: G06K19/00 ,  H04L9/32

Abstract: A method and system for identifying an authentication status of a first item. An RFID reader transmits zero and a random number to a first RFID tag associated with the first item. The first RFID tag uses a hashing function to compute a hash (H1) of a concatenation of an identifier (Id1) of the first RFID tag, the random number, and a first secret key and sends the hash H1 to the RFID reader which then transmits the identifier Id1 and the random number to a second RFID tag. The second RFID tag uses the hashing function to compute a hash (H2) of a concatenation of the identifier Id1, the random number, and a second secret key and sends the hash H2 to the RFID reader. The authentication status of authentic or counterfeit is determined for the first item based on whether or not H1 is equal to H2.

公开(公告)号：AU2003246419A8

公开(公告)日：2004-01-06

申请号：AU2003246419

申请日：2003-05-13

Applicant: IBM FRANCE

Inventor： MARMIGERE GERARD ,  PICON JOAQUIN ,  SECONDO PIERRE

IPC: G06F17/30 ,  G06F9/40 ,  G06F9/445 ,  G06F12/00 ,  G06F13/00 ,  G06F15/00

Abstract: A method and computing systems for refreshing, from a server, objects locally stored by a client device remotely connected through a communicating means to said server. The client device send a request for refresh message and a list of object identifiers and the digest of the object itself stored in its local storage. The server, after checking the deals the client device has subscribed to, sends back a refresh answer message with the objects stored locally in the client device and which needs to be refreshed. According to the deals to which the client device has subscribed, the server will also send new objects and will send a special code to specify to the client device to delete objects which are no more part of the deals.

公开(公告)号：DE3784168T2

公开(公告)日：1993-09-16

申请号：DE3784168

申请日：1987-09-23

Applicant: IBM

Inventor： BUSTINI LIONEL ,  CRETEGNY ANDRE ,  MARMIGERE GERARD ,  PLATEL GUY ,  SECONDO PIERRE

IPC: H04J3/24 ,  H04L12/64 ,  H04L12/54 ,  H04J3/16

Abstract: In a packet switching network, voice packets are made to include an EC field whose contents indicates whether the corresponding packet is eligible for clipping if required in a node queue within the network. Should clipping of a non eligible packet be required, then another bit field would be set in the following packet on same link to limit any possible clipping of successive packets an same link.

公开(公告)号：DE3685217D1

公开(公告)日：1992-06-11

申请号：DE3685217

申请日：1986-08-27

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  SECONDO PIERRE

IPC: H04Q11/04 ,  H04L12/64 ,  H04M11/00 ,  H04L12/54 ,  H04M11/06

Abstract: The bandwidth allocation mechanism comprises a unit (30-T,32-T) for dynamically and instantaneously qualifying the circuit slots, depending upon the user actively detected on a slot basis to set a qualifying bit to a value. The value indicates that the slot is assigned to a boundary circuit user. Another value indicates that the slot is momentarily free and may be assigned to the packet switched traffic. The qualifying bits are transported through the network in correspondence with the slots they qualify. Another unit (30-R,32-R) responds to the received qualifying bits and to the received bits for reconstructing boundary circuit user bit streams. The streams comprise the user data bits when the qualifying bits are found equal to the first value and to idle bit configurations when the qualifying bit is found equal to the second value.

公开(公告)号：DE3580276D1

公开(公告)日：1990-11-29

申请号：DE3580276

申请日：1985-08-13

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  SECONDO PIERRE

IPC: H04J3/16 ,  H04L12/64 ,  H04L12/54

Abstract: Method and system for configuring a succession of complex frames to be used for exchanging synchronous circuit switched bits and asynchronous packet switched bits between nodes connected through medium links working at any bit rates in a teleprocessing network.Each complex frame which contains an integer number of bits equal to Nc or Nc+1 chosen as close as possible to a predetermined number Na (256), is made of a succession of subframes and delimited by flags, in such a way that the period between two flags is equal to nT+e, T being the period of existing Time Division Multiplex Frames (125 microseconds) and n being an integer number higher or equal to 1 which depends upon the medium link bit rate and e being a period of time lower than a medium link bit period.The subframes have a duration less or equal to T, each subframe i contain an integer number Nsi of bits, said integer number being allocated to carry an integer number of circuit switched bit slots and the remaining bits being used to carry asynchronous packet switched bits.The R bits remaining in the complex frame, with are used to carry f flag bits and r=R-f padding bits which are used to carry asynchronous packet switched bits.

公开(公告)号：CA1250936A

公开(公告)日：1989-03-07

申请号：CA505862

申请日：1986-04-04

Applicant: IBM

Inventor： CALVIGNAC JEAN ,  SECONDO PIERRE

IPC: H04J3/16 ,  H04L12/64 ,  H04L11/20

Abstract: Method and system for configuring a succession of complex frames to be used for exchanging synchronous circuit switched bits and asynchronous packet switched bits between nodes connected through medium links working at any bit rates in a teleprocessing network. Each complex frame which contains an integer number of bits equal to Nc or Nc+1 chosen as close as possible to a predetermined number Na (256), is made of a succession of subframes and delimited by flags, in such a way that the period between two flags is equal to nT+e, T being the period of existing Time Division Multiplex Frames (125 microseconds) and n being an integer number higher or equal to 1 which depends upon the medium link bit rate and e being a period of time lower than a medium link bit period. The subframes have a duration less or equal to T, each subframe i contain an integer number Nsi of bits, said integer number being allocated to carry an integer number of circuit switched bit slots and the remaining bits being used to carry asynchronous packet switched bits. The R bits remaining in the complex frame, with are used to carry f flag bits and r=R-f padding bits which are used to carry asynchronous packet switched bits. Figure 2-A