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    APPARATUS AND METHOD FOR EFFICIENTLY SHARING MEMORY BANDWIDTH IN A NETWORK PROCESSOR
    1.
    发明申请
    APPARATUS AND METHOD FOR EFFICIENTLY SHARING MEMORY BANDWIDTH IN A NETWORK PROCESSOR 审中-公开
    在网络处理器中高效地共享存储带宽的装置和方法

    公开(公告)号：WO02082286A2

    公开(公告)日：2002-10-17

    申请号：PCT/GB0201484

    申请日：2002-03-28

    Applicant: IBM ,  IBM UK ,  CIT ALCATEL

    Inventor： BARRI PETER ,  CALVIGNAC JEAN ,  HEDDES MARCO ,  LOGAN JOSEPH ,  NIEMEGEERS ALEX ,  VERPLANKEN FABRICE ,  VRANA MIROSLAV

    IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

    CPC classification number: G06F13/18 ,  G06F13/161

    Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

    Abstract translation: 网络处理器（NP）包括允许最大限度利用存储器的控制器。 控制器包括一个内存仲裁器，用于监视NP中请求者的内存访问请求，并授予高优先级请求者每次访问存储器所请求的所有内存带宽。 如果高优先级请求者请求的存储器带宽小于全部存储器带宽，则请求的带宽和全部存储器带宽之间的差异被分配给较低优先权请求者。 通过这样做，每个存储器访问都利用了完整的存储器带宽。

    Method and apparatus for providing network connection table
    4.
    发明专利
    Method and apparatus for providing network connection table 有权
    提供网络连接表的方法和装置

    公开(公告)号：JP2006287932A

    公开(公告)日：2006-10-19

    申请号：JP2006094101

    申请日：2006-03-30

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： BASSO CLAUDE ,  CALVIGNAC JEAN ,  CHANG CHIH-JEN ,  DAMON PHILIPPE ,  VAIDHYANATHAN NATARAJAN ,  VERPLANKEN FABRICE J ,  VERRILLI COLIN B

    IPC: H04L12/56 ,  H04L29/02 ,  H04L29/06

    CPC classification number: H04L45/745 ,  H04L45/00 ,  H04L45/54

    Abstract: PROBLEM TO BE SOLVED: To provide a method and apparatus for implementing use of a network connection table which more shortens a required processing time and an access time, and is more easily achieved, more efficient and more inexpensive. SOLUTION: Searching for network connections includes receiving a packet, and zeroing particular fields of connection information from the packet if a new connection is to be established. The connection information is converted to an address for a location in a direct table using a table access process. The direct table stores patterns and reference information for new and existing connections. The connection information is compared with at least one pattern stored in the direct table at the address to find reference information for the received packet. COPYRIGHT: (C)2007,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种实现网络连接表的使用的方法和装置，其更加缩短所需的处理时间和访问时间，并且更容易实现，更有效和更便宜。 解决方案：搜索网络连接包括接收数据包，如果要建立新连接，则从数据包中归零特定的连接信息字段。 使用表访问进程将连接信息转换为直接表中的位置的地址。 直接表存储新连接和现有连接的模式和参考信息。 将连接信息与存储在地址中的直接表中的至少一个模式进行比较，以找到所接收的分组的参考信息。 版权所有（C）2007，JPO＆INPIT

    METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING PACKET
    5.
    发明专利
    METHOD AND DEVICE FOR TRANSMITTING AND RECEIVING PACKET 失效

    公开(公告)号：JPH1051472A

    公开(公告)日：1998-02-20

    申请号：JP12519797

    申请日：1997-05-15

    Applicant: IBM

    Inventor： CALVIGNAC JEAN ,  ORSATTI DANIEL ,  VERPLANKEN FABRICE

    IPC: H04Q3/00 ,  H04L12/28

    Abstract: PROBLEM TO BE SOLVED: To reserve irreducible bandwidth when connection is established and perform transmission and reception, and improve the efficiency of a network by scheduling received packets at a packet network node under control over an absolute time according to a speed corresponding to the reserved bandwidth. SOLUTION: A dedicated minimum service connection is expected with a queue 101 specified by a search mechanism 100, the connection queue is scheduled by a shaper unit 111 according to the speed corresponding to the reserved bandwidth by controlling the absolute time 190, and a queue identifier is stored. Then the identifier is read out and the starting packet of the corresponding queue is transmitted. While there is a free cell space, a priority mechanism function 178 performs ready identifier queue resetting out of a queue group 174, also preforms queue resetting from a minimum service connection queue 15 corresponding to the identifier, and fills a cell space 170 with ready cells.

    SCANNING DEVICE FOR COMMUNICATION LINES, ADAPTED FOR A COMMUNICATION CONTROLLER
    6.
    发明专利
    SCANNING DEVICE FOR COMMUNICATION LINES, ADAPTED FOR A COMMUNICATION CONTROLLER 未知

    公开(公告)号：DE3175351D1

    公开(公告)日：1986-10-23

    申请号：DE3175351

    申请日：1981-10-28

    Applicant: IBM ,  IBM FRANCE

    Inventor： BREZZO BERNARD ,  CALVIGNAC JEAN ,  DAMBRICOURT RICHARD ,  MASCLET ANDRE ,  SANCHE JEAN-PIERRE

    IPC: H04L69/14 ,  G06F13/00 ,  G06F13/38 ,  G06F13/42

    Abstract: A line scanning device which operates under the control of a microprocessor connected to a control memory in which a memory location area is assigned to each line is provided for a line adapter in a communication controller for receiving or sending message bits in series from or to terminals connected to the lines using any protocols. It comprises a first store which includes a first and a second memories, an area being assigned to each line in each of the memories which can be read and written in the same time and a second store which includes a single memory in which a storage location area is assigned to each line. These stores are addressed by a control and address unit which includes first and second address counters under the control of an elementary time counter, the first counter outputting the address information relating to the first store during time t provided for scanning a line, and the second counter outputting the address information relative to the second store during time nt, n being at least equal to 4, and control circuitry receiving said address information and the elementary time information for providing at the outputs of the control and address unit, memory address and read/write control information at times selected during the scanning period and sequentially, the addresses of the present lines which are scanned.

    SCANNING DEVICE FOR COMMUNICATION LINES COMPRISING AN ADDRESS GENERATOR
    7.
    发明专利
    SCANNING DEVICE FOR COMMUNICATION LINES COMPRISING AN ADDRESS GENERATOR 未知

    公开(公告)号：DE3175985D1

    公开(公告)日：1987-04-16

    申请号：DE3175985

    申请日：1981-10-28

    Applicant: IBM ,  IBM FRANCE

    Inventor： CALVIGNAC JEAN ,  GRANGER YVES ,  MASCLET ANDRE

    IPC: H04L69/14 ,  G06F13/00 ,  G06F13/22 ,  G06F13/38 ,  G06F13/42

    Abstract: The address generating device is provided for a communication line scanning device. The lines are connected to the scanning device through n line interface circuits, n varying in accordance with the network configuration. Each interface circuit can be connected to a various number of lines, for instance one line or k lines in a preferred embodiment, and comprises means for providing to the address generating device, a presence indicating signal indicating that it is plugged and a signal indicating the number of the lines connected thereto. A first logic circuit receives the presence indicating signals as inputs and generates on its outputs the address bits of the last present interface circuit to be scanned. A first counter able to count in binary mode up to n-1 is incremented by an increment pulse provided by a clock on each period assigned to the scanning of a line. This counter outputs the address bits of the successive interface circuits. A comparator compares the address bits so generated and the address bits of the last present interface circuit to be scanned and outputs a reset signal when these bits are equal.

    Verbinden eines externen Netzwerkcoprozessors mit einem Netzwerkprozessor-Paket-Parser
    8.
    发明专利
    Verbinden eines externen Netzwerkcoprozessors mit einem Netzwerkprozessor-Paket-Parser 未知

    公开(公告)号：DE112011104443B4

    公开(公告)日：2019-10-02

    申请号：DE112011104443

    申请日：2011-12-19

    Applicant: IBM

    Inventor： VERPLANKEN FABRICE JEAN ,  VERRILLI COLIN ,  VAIDHYANATHAN NATARAJAN ,  PHILIPPE DAMON ,  CHANG CHIH-JEN ,  CALVIGNAC JEAN ,  BASSO CLAUDE

    IPC: H04L12/70 ,  G06F5/16 ,  G06F9/38 ,  G06F13/00 ,  G06F15/163 ,  H04L29/06

    Abstract: Verfahren in einem Netzwerkprozessorchip (100), der erste Übertragungsprotokollanschlüsse (200-203) aufweist, wobei jeder Datenpfad-Datenverkehr von Paketen mit einer Mindestgröße M Byte auf N bidirektionalen Lanes (170) bei einer Geschwindigkeit von S GBit/s unterstützt und Datenverkehr mit unterschiedlichen Übertragungsprotokolleinheiten (120, 130) im Netzwerkprozessorchip (100) auf n weiteren bidirektionalen Lanes (190) bei einer Geschwindigkeit von s GBit/s unterstützt, um das Verwenden der ersten Übertragungsprotokollanschlüsse (200-203) für Zugriff auf einen externen Coprozessor (110) durch eine Paket-Parsing-Netzwerklogik (230-233) zu unterstützen, die in jedem der ersten Übertragungsprotokollanschlüsse (200-203) angeordnet ist, die während einer Parsing-Periode bei Empfang eines Pakets mit einer Mindestgröße M Byte eine Anforderung an den externen Coprozessor (110) sendet und eine Antwort vom externen Coprozessor (110) erhält (150), wobei das Verfahren aufweist, dassder Paket-Parser (140; 230-233) eine Anforderung mit einem Wort von maximal m Byte an den Coprozessor (110) auf den n weiteren bidirektionalen Lanes mit einer Geschwindigkeit von s GBit/s sendet und eine Antwort mit einem Wort von maximal m Byte vom externen Coprozessor (110) auf den gleichen weiteren bidirektionalen Lanes mit einer Geschwindigkeit von s GBit/s empfängt, so dass die Formel N x S/M ≤ n x s/m beachtet wird; undvor dem Senden von Datenverkehr auf den n weiteren bidirektionalen Lanes bei einer Geschwindigkeit von s GBit/s, das Multiplexen des Datenverkehrs des Coprozessorzugriffs mit einem Wort von maximal m Byte in einem ersten Übertragungsprotokollanschluss (200-203) und des Datenverkehrs mit einer der unterschiedlichen Übertragungsprotokolleinheiten (120, 130) in dem Netzwerkprozessorchip (100) in einem Zwei-Eingaben-Multiplexer (340, 341, 400-403), wobei der Zwei-Eingaben-Multiplexer (340, 341, 400-403) statisch auf einen der zwei gemultiplexten Datenverkehre konfigurierbar ist.

    10.
    发明专利
    未知

    公开(公告)号：DE60205231D1

    公开(公告)日：2005-09-01

    申请号：DE60205231

    申请日：2002-03-28

    Applicant: ALCATEL SA ,  IBM

    Inventor： BARRI PETER ,  CALVIGNAC JEAN ,  HEDDES MARCO C O IBM UNITED KI ,  LOGAN JOSEPH ,  NIEMEGEERS ALEX ,  VERPLANKEN FABRICE ,  VRANA MIROSLAV

    IPC: G06F12/00 ,  G06F13/16 ,  G06F13/18

    Abstract: A Network Processor (NP) includes a controller that allows maximum utilization of the memory. The controller includes a memory arbiter that monitors memory access requests from requesters in the NP and awards high priority requesters all the memory bandwidth requested per access to the memory. If the memory bandwidth requested by the high priority requester is less than the full memory bandwidth, the difference between the requested bandwidth and full memory bandwidth is assigned to lower priority requesters. By so doing every memory access utilizes the full memory bandwidth.

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