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公开(公告)号:CA1091312A
公开(公告)日:1980-12-09
申请号:CA299176
申请日:1978-03-17
Applicant: IBM
Inventor: DIMARIA DONELLI J , YOUNG DONALD R
IPC: H01L27/04 , H01L21/3115 , H01L21/316 , H01L21/822 , H01L29/78 , H01L29/94 , H01L29/34
Abstract: A high field capacitor structure includes an insulating layer having a carrier trapping region between two electrodes. The trapping region improves electric breakdown characteristics of the capacitor structure and is particularly useful in avoiding the low breakdown voltages and high leakage currents normally encountered in structures with asperities, such as SiO2 over poly Si. The trapping region can be formed by chemical vapor deposition (CVD) process, by evaporation or by ion implantation. The trapping region is close to the Si, but far enough away to eliminate the possibility of reverse tunneling from discharging the traps in the absence of an applied voltage.
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公开(公告)号:DE2810597A1
公开(公告)日:1979-01-11
申请号:DE2810597
申请日:1978-03-11
Applicant: IBM
Inventor: DIMARIA DONELLI J , YOUNG DONALD R
IPC: H01L29/417 , G11C16/04 , H01L21/28 , H01L21/3115 , H01L21/8247 , H01L27/088 , H01L29/51 , H01L29/788 , H01L29/792 , H01L29/94 , H01L45/00 , H01L29/76 , G11C11/34
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公开(公告)号:DE2805170A1
公开(公告)日:1979-01-04
申请号:DE2805170
申请日:1978-02-08
Applicant: IBM
Inventor: DIMARIA DONELLI J , YOUNG DONALD R
IPC: H01L27/04 , H01L21/3115 , H01L21/316 , H01L21/822 , H01L29/78 , H01L29/94
Abstract: A high field capacitor structure comprising: a pair of separate electrodes, and an insulating layer dispersed between said pair of electrodes, said insulating layer having a carrier capture region. (Machine-translation by Google Translate, not legally binding)
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公开(公告)号:FR2282163A1
公开(公告)日:1976-03-12
申请号:FR7521463
申请日:1975-07-01
Applicant: IBM
Inventor: BLACHMAN ARTHUR G , MANNOR BRIARCLIFF , YOUNG DONALD R
IPC: H01L21/283 , H01L21/00 , H01L21/3115 , H01L21/8234 , H01L21/8247 , H01L27/06 , H01L29/00 , H01L29/78 , H01L29/788 , H01L29/792 , H01L21/265 , H01L29/94
Abstract: In the prodn. of metal oxide semiconductors (MOS structures) by applying a SiO2 layer to a p-conducting Si substrate and then adjusting the surface potential of the Si, a negative charge is produced in the boundary layer between then Si substrate and the SiO2 layer by introducing B ions into the SiO2 layer, which makes the substrate surface more strongly p-conducting, and then the oxide-coated substrate is tempered in a gas atmos. Method is useful in the prodn. of MOS capacitors, field effect transistors (FETs) and printed circuit contg. FETs. The process is simple, easy and exact, prevents the formation of positive charges in the SiO2 layer and makes the substrate surface more strongly p-conducting.
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公开(公告)号:CA595213A
公开(公告)日:1960-03-29
申请号:CA595213D
Applicant: IBM
Inventor: YOUNG DONALD R , HUIBREGTSE EDWARD J , DROUGARD MAURICE E
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公开(公告)号:CA572717A
公开(公告)日:1959-03-24
申请号:CA572717D
Applicant: IBM
Inventor: LANO RALPH B DE JR , YOUNG DONALD R
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