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公开(公告)号:US20210374209A1
公开(公告)日:2021-12-02
申请号:US16890122
申请日:2020-06-02
Applicant: Intel Corporation
Inventor: Joydeep Ray , Fangwen Fu , Dhiraj D. Kalamkar , Sasikanth Avancha
Abstract: An apparatus to facilitate machine learning matrix processing is disclosed. The apparatus comprises a memory to store matrix data one or more processors to execute an instruction to examine a message descriptor included in the instruction to determine a type of matrix layout manipulation operation that is to be executed, examine a message header included in the instruction having a plurality of parameters that define a two-dimensional (2D) memory surface that is to be retrieved, retrieve one or more blocks of the matrix data from the memory based on the plurality of parameters and a register file including a plurality of registers, wherein the one or more blocks of the matrix data is stored within a first set of the plurality of registers.
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公开(公告)号:US10924744B2
公开(公告)日:2021-02-16
申请号:US15815759
申请日:2017-11-17
Applicant: INTEL CORPORATION
Inventor: Fangwen Fu , Jason Tanner , Satya N. Yedidi
IPC: H04N19/146 , H04N19/51 , G06F9/451 , H04N19/105 , H04N19/172 , H04N19/107 , G06F8/38 , H04N19/192 , H04N19/567
Abstract: The present techniques include deriving a threshold to maintain an encoding bitrate and determining a percentage of change of a current frame N based on an impact to a bitrate budget. The present techniques also include marking a reference frame N−1 as non-referenceable in response to the percentage of change being smaller than the threshold and encoding a static portion of frame N as a skip and encoding a non-static portion of frame N by referencing the reference frame N−1. Finally, the present techniques include overwriting a surface of the reference frame N with portions of the reference frame N−1 that have changed as compared to frame N.
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33.
公开(公告)号:US20200186831A1
公开(公告)日:2020-06-11
申请号:US16707485
申请日:2019-12-09
Applicant: Intel Corporation
Inventor: Jill M. Boyce , Sumit Mohan , James M. Holland , Sang-Hee Lee , Abhishek R. Appu , Wen-Fu Kao , Joydeep Ray , Ya-Ti Peng , Keith W. Rowe , Fangwen Fu , Satya N. Yedidi
IPC: H04N19/593 , G06T11/00 , H04N19/597 , H04N19/136 , H04N19/46 , H04N19/436 , H04N19/105 , H04N19/176 , H04N19/52
Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
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公开(公告)号:US20200059648A1
公开(公告)日:2020-02-20
申请号:US16666140
申请日:2019-10-28
Applicant: INTEL CORPORATION
Inventor: Fangwen Fu , Iole Moccagatta
IPC: H04N19/13 , H04N19/436 , H04N19/182 , H04N19/176
Abstract: A method, system, and articles of high throughput arithmetic entropy coding for video coding uses a non-framewidth raster order or non-raster order to form spatial neighbor probability contexts for entropy coding.
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公开(公告)号:US20200005424A1
公开(公告)日:2020-01-02
申请号:US16515794
申请日:2019-07-18
Applicant: Intel Corporation
Inventor: Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Jill M. Boyce , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland , Keith W. Rowe , Altug Koker
IPC: G06T1/20 , G06T1/60 , G09G5/00 , H04N19/156 , G06F1/3206 , G06F1/3234
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
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公开(公告)号:US10402932B2
公开(公告)日:2019-09-03
申请号:US15488569
申请日:2017-04-17
Applicant: Intel Corporation
Inventor: Abhishek R. Appu , Stanley J. Baran , Sang-Hee Lee , Atthar H. Mohammed , Jong Dae Oh , Hiu-Fai R. Chan , Jill M. Boyce , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland , Keith W. Rowe , Altug Koker
IPC: H04N19/156 , G06T1/20 , G06T1/60 , G09G5/00 , G06F1/3206 , G06F1/3234 , G06F1/3212
Abstract: An embodiment of an electronic processing system may include an application processor, persistent storage media communicatively coupled to the application processor, a graphics subsystem communicatively coupled to the application processor, a power budget analyzer to identify a power budget for one or more of the application processor, the persistent storage media, and the graphics subsystem, a target analyzer communicatively coupled to the graphics subsystem to identify a target for the graphics subsystem, and a parameter adjuster to adjust one or more parameters of the graphics subsystem based on one or more of the identified power budget and the identified target.
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公开(公告)号:US20190228544A1
公开(公告)日:2019-07-25
申请号:US16259473
申请日:2019-01-28
Applicant: Intel Corporation
Inventor: Jill M. Boyce , Keith W. Rowe , James M. Holland , Fangwen Fu , Satya N. Yedidi , Sumit Mohan
Abstract: A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and logic. The logic includes a graphics pipeline to generate rendered content, a base layer encoder to encode real world content into a base layer and a first layer encoder to encode rendered content into a first non-base layer, a multiplexer to interleave the base layer with the first non-base layer to obtain a single output signal having mixed reality content, and a transmitter to transmit the single output signal. The system further includes a second layer encoder to encode map data into a second non-base layer. The multiplexer to interleave the second non-base layer with the first non-base layer and the base layer. The first and second layer encoders encode the rendered content and the map data into overlay auxiliary pictures.
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公开(公告)号:US20190045185A1
公开(公告)日:2019-02-07
申请号:US15855824
申请日:2017-12-27
Applicant: Intel Corporation
Inventor: Fangwen Fu
IPC: H04N19/117 , H04N19/124 , H04N19/132 , H04N19/70 , H04N19/159 , H04N19/137 , H04N19/189 , H04N19/176
CPC classification number: H04N19/117 , H04N19/119 , H04N19/124 , H04N19/132 , H04N19/137 , H04N19/14 , H04N19/159 , H04N19/176 , H04N19/189 , H04N19/70
Abstract: Coding tools are described for subjective quality improvements in video codecs. Some embodiments pertain to a method that includes receiving video frames, generating a segmentation map of a received video frame, determining features of a segment of the segmentation map, determining if the segment has a skip or a reference frame feature, and if the segment has one of a skip or a reference frame feature, then classifying the segment as an active segment and attaching an active segment identifier to the segment.
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公开(公告)号:US20180308257A1
公开(公告)日:2018-10-25
申请号:US15495238
申请日:2017-04-24
Applicant: Intel Corporation
Inventor: Jill M. Boyce , Keith W. Rowe , James M. Holland , Fangwen Fu , Satya N. Yedidi , Sumit Mohan
CPC classification number: G06T9/00 , G06T1/20 , G06T1/60 , G06T15/00 , G06T15/005 , G06T19/006 , G06T2200/04 , G06T2200/28 , G06T2215/16 , H04N19/27 , H04N19/30 , H04N19/42
Abstract: A system includes a camera to capture real world content and a semiconductor package apparatus. The semiconductor package apparatus includes a substrate and logic. The logic includes a graphics pipeline to generate rendered content, a base layer encoder to encode real world content into a base layer and a first layer encoder to encode rendered content into a first non-base layer, a multiplexer to interleave the base layer with the first non-base layer to obtain a single output signal having mixed reality content, and a transmitter to transmit the single output signal. The system further includes a second layer encoder to encode map data into a second non-base layer. The multiplexer to interleave the second non-base layer with the first non-base layer and the base layer. The first and second layer encoders encode the rendered content and the map data into overlay auxiliary pictures.
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40.
公开(公告)号:US20180288435A1
公开(公告)日:2018-10-04
申请号:US15476989
申请日:2017-04-01
Applicant: Intel Corporation
Inventor: Jill M. Boyce , Sang-Hee Lee , Abhishek R. Appu , Wen-Fu Kao , Joydeep Ray , Ya-Ti Peng , Keith W. Rowe , Fangwen Fu , Satya N. Yedidi , Sumit Mohan , James M. Holland
IPC: H04N19/593 , H04N19/597 , G06T11/00 , H04N13/04 , G03B37/04
Abstract: An embodiment of an electronic processing system may include a 2D frame which corresponds to a projection of a 360 video space, and a component predictor to predict an encode component for a first block of a 2D frame based on encode information from a neighboring block which is neighboring to the first block of the 2D frame only in the 360 video space, a prioritizer to prioritize transmission for a second block of the 2D frame based on an identified region of interest, and/or a format detector to detect a 360 video format of the 2D frame based on image content. A 360 video capture device may include a contextual tagger to tag 360 video content with contextual information which is contemporaneous with the captured 360 video content. Other embodiments are disclosed and claimed.
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