公开(公告)号：US20220138003A1

公开(公告)日：2022-05-05

申请号：US17504062

申请日：2021-10-18

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Ned M. Smith ,  Thomas Willhalm ,  Timothy Verrall

IPC: G06F9/48 ,  G06F16/23 ,  H04L9/06 ,  G06F16/27 ,  H04L9/32 ,  H04L12/66 ,  H04L41/12 ,  H04L47/70 ,  H04L67/52 ,  H04L67/60 ,  G06F9/50 ,  G06F21/60 ,  H04L9/08 ,  G06F11/30 ,  G06F9/455

Abstract: Methods, apparatus, systems and machine-readable storage media of an edge computing device which is enabled to access and select the use of local or remote acceleration resources for edge computing processing is disclosed. In an example, an edge computing device obtains first telemetry information that indicates availability of local acceleration circuitry to execute a function, and obtains second telemetry that indicates availability of a remote acceleration function to execute the function. An estimated time (and cost or other identifiable or estimateable considerations) to execute the function at the respective location is identified. The use of the local acceleration circuitry or the remote acceleration resource is selected based on the estimated time and other appropriate factors in relation to a service level agreement.

公开(公告)号：US20220038388A1

公开(公告)日：2022-02-03

申请号：US17500543

申请日：2021-10-13

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Thomas Willhalm ,  Mark A. Schmisseur ,  Timothy Verrall

IPC: H04L12/919 ,  H04L12/911 ,  G06F9/50 ,  G06N20/00

Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (Al) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the Al circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.

公开(公告)号：US11212085B2

公开(公告)日：2021-12-28

申请号：US16368982

申请日：2019-03-29

Applicant: Intel Corporation

Inventor： Timothy Verrall ,  Thomas Willhalm ,  Francesc Guim Bernat ,  Karthik Kumar ,  Ned M. Smith ,  Rajesh Poornachandran ,  Kapil Sood ,  Tarun Viswanathan ,  John J. Browne ,  Patrick Kutch

IPC: H04L9/08

Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.

公开(公告)号：US20210194821A1

公开(公告)日：2021-06-24

申请号：US17195409

申请日：2021-03-08

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Thomas Willhalm ,  Mark A. Schmisseur ,  Timothy Verrall

IPC: H04L12/919 ,  H04L12/911 ,  G06F9/50 ,  G06N20/00

Abstract: There is disclosed in one example an application-specific integrated circuit (ASIC), including: an artificial intelligence (AI) circuit; and circuitry to: identify a flow, the flow including traffic diverted from a core cloud service of a network to be serviced by an edge node closer to an edge of the network than to the core of the network; receive telemetry related to the flow, the telemetry including fine-grained and flow-level network monitoring data for the flow; operate the AI circuit to predict, from the telemetry, a future service-level demand for the edge node; and cause a service parameter of the edge node to be tuned according to the prediction.

公开(公告)号：US11025411B2

公开(公告)日：2021-06-01

申请号：US15912733

申请日：2018-03-06

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Suraj Prabhakaran ,  Kshitij Doshi ,  Timothy Verrall

IPC: H04L29/08 ,  H04L9/08 ,  G06F3/06 ,  G06F9/50 ,  H04L29/06 ,  G06F16/25 ,  G06F16/2453 ,  H04L12/861 ,  G11C8/12 ,  G11C29/02 ,  H04L12/24 ,  G06F30/34 ,  G11C29/36 ,  G11C29/38 ,  G11C29/44 ,  G06F16/22 ,  G06F16/2455 ,  G06F12/02 ,  G06F12/14 ,  G06F13/16 ,  G06F15/173 ,  G06F13/40 ,  G06F13/42 ,  G06F9/448 ,  G06F9/28 ,  G06F15/16 ,  H04L12/703 ,  H04L12/743 ,  H04L12/801 ,  H04L12/803 ,  H04L12/935 ,  H04L12/931 ,  G06F9/4401 ,  G06F9/445 ,  G06F12/06 ,  G06F16/23 ,  G06F16/248 ,  G06F16/901 ,  G06F16/11 ,  G06F12/0802 ,  G06F12/1045

Abstract: Technologies for providing streamlined provisioning of accelerated functions in a disaggregated architecture include a compute sled. The compute sled includes a network interface controller and circuitry to determine whether to accelerate a function of a workload executed by the compute sled, and send, to a memory sled and in response to a determination to accelerate the function, a data set on which the function is to operate. The circuitry is also to receive, from the memory sled, a service identifier indicative of a memory location independent handle for data associated with the function, send, to a compute device, a request to schedule acceleration of the function on the data set, receive a notification of completion of the acceleration of the function, and obtain, in response to receipt of the notification and using the service identifier, a resultant data set from the memory sled. The resultant data set was produced by an accelerator device during acceleration of the function on the data set. Other embodiments are also described and claimed.

公开(公告)号：US10936039B2

公开(公告)日：2021-03-02

申请号：US16011842

申请日：2018-06-19

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Suraj Prabhakaran ,  Timothy Verrall ,  Karthik Kumar ,  Mark A. Schmisseur

IPC: G06F1/3234 ,  H04L29/08 ,  G06F9/50 ,  H04L12/24 ,  G06F1/3293 ,  G06F1/3206 ,  H04L12/26

Abstract: In one embodiment, an apparatus of an edge computing system includes memory that includes instructions and processing circuitry coupled to the memory. The processing circuitry implements the instructions to process a request to execute at least a portion of a workflow on pooled computing resources, the workflow being associated with a particular tenant, determine an amount of power to be allocated to particular resources of the pooled computing resources for execution of the portion of the workflow based on a power budget associated with the tenant and a current power cost, and control allocation of the determined amount of power to the particular resources of the pooled computing resources during execution of the portion of the workflow.

公开(公告)号：US20190141120A1

公开(公告)日：2019-05-09

申请号：US16234718

申请日：2018-12-28

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Ned Smith ,  Thomas Willhalm ,  Francesc Guim Bernat ,  Karthik Kumar ,  Timothy Verrall

IPC: H04L29/08

Abstract: Technologies for providing selective offload of execution of an application to the edge include a device that includes circuitry to determine whether a section of an application to be executed by the device is available to be offloaded. Additionally, the circuitry is to determine one or more characteristics of an edge resource available to execute the section. Further, the circuitry is to determine, as a function of the one or more characteristics and a target performance objective associated with the section, whether to offload the section to the edge resource and offload, in response to a determination to offload the section, the section to the edge resource.

公开(公告)号：US20250071023A1

公开(公告)日：2025-02-27

申请号：US18453812

申请日：2023-08-22

Applicant: Intel Corporation

Inventor： Kshitij Doshi ,  Francesc Guim Bernat ,  Ned Smith ,  Timothy Verrall ,  Rajesh Gadiyar

IPC: H04L41/0896 ,  H04L9/40 ,  H04L41/0893

Abstract: Methods, apparatus, systems and articles of manufacture are disclosed to manage telemetry data in an edge environment. An example apparatus includes a publisher included in a first edge platform to publish a wish list obtained from a consumer, the wish list including tasks to execute, a commitment determiner to determine whether a commitment is viable to execute at least one of the tasks in the wish list, the commitment to be processed to identify the telemetry data, and a communication interface to establish a communication channel to facilitate transmission of the telemetry data from the first edge platform to a second edge platform.

公开(公告)号：US12204396B2

公开(公告)日：2025-01-21

申请号：US17132202

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Karthik Kumar ,  Timothy Verrall

IPC: G06F1/32 ,  G06F1/329 ,  G06F9/48 ,  G06N20/00 ,  H04L41/5003

Abstract: Various aspects of methods, systems, and use cases include coordinating actions at an edge device based on power production in a distributed edge computing environment. A method may include identifying a long-term service level agreement (SLA) for a component of an edge device, and determining a list of resources related to the component using the long-term SLA. The method may include scheduling a task for the component based on the long-term SLA, a current battery level at the edge device, a current energy harvest rate at the edge device, or an amount of power required to complete the task. A resource of the list of resources may be used to initiate the task, such as according to the scheduling.

公开(公告)号：US12189512B2

公开(公告)日：2025-01-07

申请号：US16829935

申请日：2020-03-25

Applicant: Intel Corporation

Inventor： Francesc Guim Bernat ,  Steven Briscoe ,  Karthik Kumar ,  Alexander Bachmutsky ,  Timothy Verrall

IPC: G06F11/34 ,  H04L43/08

Abstract: Examples described herein relate to an apparatus that includes a memory and at least one processor where the at least one processor is to receive configuration to gather performance data for a function from one or more platforms and during execution of the function, collect performance data for the function and store the performance data after termination of execution of the function. Some examples include an interface coupled to the at least one processor and the interface is to receive one or more of: an identifier of a function, resources to be tracked as part of function execution, list of devices to be tracked as part of function execution, type of monitoring of function execution, or meta-data to identify when the function is complete. Performance data can be accessed to determine performance of multiple executions of the short-lived function.