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    31.
    发明专利
    未知

    公开(公告)号：BRPI0411386A

    公开(公告)日：2006-07-18

    申请号：BRPI0411386

    申请日：2004-05-06

    Applicant: INTERDIGITAL TECH CORP

    Inventor： DEMIR ALPASLAN ,  KAZAKEVICH LEONID ,  HAQUE TANBIR

    IPC: H03G3/00 ,  H03G3/30 ,  H04B1/30 ,  H04B7/005 ,  H04L27/00 ,  H04L27/38 ,  H04B1/06 ,  H04B7/00 ,  H04L25/10 ,  H04L27/08

    Abstract: A communication system including an automatic control (AGC) circuit, a receiver, an analog to digital converter (ADC) and an insertion phase variation compensation module. The AGC circuit receives and amplifies communication signals. The gain of the AGC circuit is continuously adjusted. The AGC circuit outputs an amplified signal to the receiver which, in turn, outputs an analog complex signal to the ADC. The ADC outputs a digital complex signal to an insertion phase variation compensation module which counteracts the effects of phase offsets introduced into the communication signal due to the continuous gain adjustments associated with the AGC circuit.

    METODO Y SISTEMA PARA COMPENSACION PARA VARIACIONES DE FASE DE UN AMPLIFICADOR.
    33.
    发明专利
    METODO Y SISTEMA PARA COMPENSACION PARA VARIACIONES DE FASE DE UN AMPLIFICADOR. 未知

    公开(公告)号：MXPA05013123A

    公开(公告)日：2006-03-16

    申请号：MXPA05013123

    申请日：2004-05-05

    Applicant: INTERDIGITAL TECH CORP

    Inventor： HAQUE TANBIR

    IPC: H04L25/10 ,  H03G3/30 ,  H04B1/16 ,  H04L25/66

    Abstract: Un sistema de comunicacion que incluye un amplificador, un receptor, un convertidor de analogo a digital (ADC) y un modulo de compensacion de variacion de fase de insercion. El amplificador recibe una senal de comunicacion. Si el amplificador esta habilitado, el amplificador amplifica la senal de comunicacion y da salida a la senal de comunicacion amplificada al receptor. Si el amplificador esta deshabilitado, el amplificador pasa la senal de comunicacion al receptor sin amplificarla. El receptor da salida a una senal compleja analoga al ADC. El ADC da salida a una senal compleja digital al modulo de compensacion de variacion de fase de insercion que contrarresta los efectos de un desplazamiento de fase introducido de manera intermitente en la senal de comunicacion cuando el amplificador esta habilitado o deshabilitado.

    34.
    发明专利
    未知

    公开(公告)号：NO20060063L

    公开(公告)日：2006-01-30

    申请号：NO20060063

    申请日：2006-01-05

    Applicant: INTERDIGITAL TECH CORP

    Inventor： KAZAKEVICH LEONID ,  HAQUE TANBIR ,  DEMIR ALPASLAN

    IPC: H03M1/12 ,  H03G3/30 ,  H04B1/16 ,  H04L25/66

    Abstract: A communication system including an amplifier, a receiver, an analog to digital converter (ADC) and an insertion phase variation compensation module. The amplifier receives a communication signal. If the amplifier is enabled, the amplifier amplifies the communication signal and outputs the amplified communication signal to the receiver. If the amplifier is disabled, the amplifier passes the communication signal to the receiver without amplifying it. The receiver outputs an analog complex signal to the ADC. The ADC outputs a digital complex signal to the insertion phase variation compensation module which counteracts the effects of a phase offset intermittently introduced into the communication signal when the amplifier is enabled or disabled.

    EXAMINER
    38.
    发明专利
    EXAMINER 未知

    公开(公告)号：CA2528455A1

    公开(公告)日：2005-01-06

    申请号：CA2528455

    申请日：2004-05-05

    Applicant: INTERDIGITAL TECH CORP

    Inventor： DEMIR ALPASLAN ,  HAQUE TANBIR ,  KAZAKEVICH LEONID

    IPC: H04L25/66 ,  H03G3/30 ,  H04B1/16 ,  H04L25/10

    Abstract: A communication system including an amplifier (105), a receiver (110), an analog to digital converter (ADC 115) and an insertion phase variation compensation module (120). The amplifier receives a communication signal (150). If the amplifier is enabled, the amplifier amplifies the communicatio n signal and outputs the amplified communication signal to the receiver. If th e amplifier is disabled, the amplifier passes the communication signal to the receiver without amplifying it. The receiver outputs an analog complex signa l to the ADC. The ADC outputs a digital complex signal to the insertion phase variation compensation module which counteracts the effects of a phase offse t intermittently introduced into the communication signal when the amplifier i s enabled or disabled.

    40.
    发明专利
    未知

    公开(公告)号：DE602004009579T2

    公开(公告)日：2008-07-24

    申请号：DE602004009579

    申请日：2004-05-20

    Applicant: INTERDIGITAL TECH CORP

    Inventor： DEMIR ALPASLAN ,  KAZAKEVICH LEONID ,  HAQUE TANBIR

    IPC: H03D3/00

    Abstract: A digital baseband (DBB) radio frequency (RF) receiver includes a digital high pass filter compensation (HPFC) module used to suppress group delay variation distortion caused by using low cost analog high pass filters (HPFs) in the receiver. The digital HPFC module reduces a cutoff frequency, established by the HPFs for the real and imaginary signal component frequency domain responses by providing a first compensation signal having a first predetermined value (K 1 ). The digital HPFC module adjusts the gain of the high pass response of the real and imaginary signal component frequency domains by providing a second compensation signal having a second predetermined value (K 2 ).

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