公开(公告)号：US20210321093A1

公开(公告)日：2021-10-14

申请号：US17358684

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Vijay Sundaram ,  Yi-Jen Chiu

IPC: H04N19/105 ,  H04N19/176 ,  H04N19/119 ,  H04N19/11 ,  H04N19/593

Abstract: Methods, articles, and systems of video coding use efficient intra block copying.

公开(公告)号：US20210314614A1

公开(公告)日：2021-10-07

申请号：US17121669

申请日：2020-12-14

Applicant: Intel Corporation

Inventor： Wenhao Zhang ,  Yi-Jen Chiu ,  Pieter Kapsenberg ,  Lidong Xu ,  Yu Han ,  Zhipin Apple Deng ,  Xiaoxia Cai

IPC: H04N19/60 ,  H04N19/96 ,  H04N19/91 ,  H04N19/122

Abstract: Systems, apparatus, articles, and methods are described including operations for size based transform unit context derivation.

公开(公告)号：US10939038B2

公开(公告)日：2021-03-02

申请号：US15495525

申请日：2017-04-24

Applicant: Intel Corporation

Inventor： Jason Tanner ,  Wen-Fu Kao ,  Ping Liu ,  Yi-Jen Chiu ,  Ya-Ti Peng

IPC: H04N5/232 ,  H04N21/81 ,  H04N21/6587 ,  G06F3/147 ,  H04N21/4728 ,  G06T11/00 ,  G09G5/14 ,  G02B27/01 ,  G09G3/00 ,  G09G5/38 ,  G09G5/39 ,  G09G5/36 ,  G06F3/01 ,  H04N21/41 ,  H04N21/239 ,  H04N21/422

Abstract: Systems, apparatuses and methods may provide for technology to improve an appearance of objects that enter a viewable area of a 360-degree video. The technology may include a head mounted display (HMD), a viewport comprising a viewable area within the HMD, and a memory to store objects of interest not currently in the viewable area.

公开(公告)号：US10863194B2

公开(公告)日：2020-12-08

申请号：US16552995

申请日：2019-08-27

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Lidong Xu ,  Hong Jiang

IPC: H04N19/52 ,  H04N19/577 ,  H04N19/56 ,  H04N19/44 ,  H04N19/51

Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.

公开(公告)号：US10516898B2

公开(公告)日：2019-12-24

申请号：US15961677

申请日：2018-04-24

Applicant: Intel Corporation

Inventor： Wenhao Zhang ,  Yi-Jen Chiu ,  Lidong Xu ,  Yu Han ,  Hong Jiang

IPC: H04N19/30 ,  H04N19/63 ,  H04N19/36 ,  H04N19/18 ,  H04N19/132 ,  H04N19/157

Abstract: Methods, systems, and computer program products for the generation of multiple layers of scaled encoded video data compatible with the HEVC standard. Residue from prediction processing may be transformed into coefficients in the frequency domain. The coefficients may then be sampled to create a layer of encoded data. The coefficients may be sampled in different ways to create multiple respective layers. The layers may then be multiplexed and sent to a decoder. There, one or more of the layers may be chosen. The choice of certain layer(s) may be dependent on the desired attributes of the resulting video. A certain level of video quality, frame rate, resolution, and/or bit depth may be desired, for example. The coefficients in the chosen layers may then be assembled to create a version of the residue to be used in video decoding.

公开(公告)号：US10453270B2

公开(公告)日：2019-10-22

申请号：US15127785

申请日：2015-09-11

Applicant: INTEL CORPORATION

Inventor： Ke Chen ,  Zhipin Deng ,  Xiaoxia Cai ,  Chen Wang ,  Ya-Ti Peng ,  Yi-Jen Chiu ,  Lidong Xu

IPC: G06T7/00 ,  G06T19/20 ,  G06T7/90 ,  G06K9/00 ,  G06T5/00 ,  G06T15/00

Abstract: Systems, apparatus, articles, and methods are described below including operations for scalable real-time face beautification of video images.

公开(公告)号：US10123011B2

公开(公告)日：2018-11-06

申请号：US15589165

申请日：2017-05-08

Applicant: Intel Corporation

Inventor： Lidong Xu ,  Yi-Jen Chiu ,  Wenhao Zhang ,  Hong Jiang

IPC: H04N7/12 ,  H04N19/117 ,  H04N19/182 ,  H04N19/147 ,  H04N19/136

Abstract: Reconstructed picture quality for a video codec system may be improved by categorizing reconstructed pixels into different histogram bins with histogram segmentation and then applying different filters on different bins. Histogram segmentation may be performed by averagely dividing the histogram into M bins or adaptively dividing the histogram into N bins based on the histogram characteristics. Here M and N may be a predefined, fixed, non-negative integer value or an adaptively generated value at encoder side and may be sent to decoder through the coded bitstream.

公开(公告)号：US20180281684A1

公开(公告)日：2018-10-04

申请号：US15477004

申请日：2017-04-01

Applicant: Intel Corporation

Inventor： Jill M. Boyce ,  Stanley J. Baran ,  Sumit Mohan ,  Jason Tanner ,  Yi-Jen Chiu ,  Atthar H. Mohammed

IPC: B60R1/08 ,  B60R1/00 ,  G06K9/00 ,  G06F1/32

Abstract: A system, method, and computer readable medium may include technology to enable optimal usage of automotive virtual mirrors. A gaze detector monitors a driver's eyes to determine if the driver is looking in the direction of a virtual mirror. If the driver is not looking in the direction of virtual mirror, all virtual mirrors are placed in a low operational mode. If the driver is looking in the direction of a virtual mirror, the virtual mirror being viewed is placed in a high operational mode and all other virtual mirrors are placed in the low operational mode.

公开(公告)号：US20180242012A1

公开(公告)日：2018-08-23

申请号：US15960120

申请日：2018-04-23

Applicant: Intel Corporation

Inventor： Yi-Jen Chiu ,  Lidong Xu ,  Hong Jiang

IPC: H04N19/52 ,  H04N19/577 ,  H04N19/56 ,  H04N19/51 ,  H04N19/44

CPC classification number: H04N19/52 ,  H04N19/44 ,  H04N19/51 ,  H04N19/56 ,  H04N19/577

Abstract: Method and apparatus for deriving a motion vector at a video decoder. A block-based motion vector may be produced at the video decoder by utilizing motion estimation among available pixels relative to blocks in one or more reference frames. The available pixels could be, for example, spatially neighboring blocks in the sequential scan coding order of a current frame, blocks in a previously decoded frame, or blocks in a downsampled frame in a lower pyramid when layered coding has been used.

公开(公告)号：US10045041B2

公开(公告)日：2018-08-07

申请号：US14782593

申请日：2013-12-23

Applicant: INTEL CORPORATION

Inventor： Wenhao Zhang ,  Yi-Jen Chiu ,  Lidong Xu ,  Yu Han ,  Zhipin Deng ,  Xiaoxia Cai

IPC: H04N11/02 ,  H04N19/51 ,  H04N19/50 ,  H04N19/176 ,  H04N19/30 ,  H04N19/61 ,  H04N19/103 ,  H04N19/157 ,  H04N19/187 ,  H04N19/19

Abstract: Techniques for inter-layer residual prediction are described. In one embodiment, for example, an apparatus may comprise an encoding component to determine whether a predicted motion for an enhancement layer block is consistent with a predicted motion for a collocated lower-layer block, determine whether to apply inter-layer residual prediction to the enhancement layer block based on whether the predicted motion for the enhancement layer block is consistent with the predicted motion for the collocated lower-layer block, and in response to a determination that inter-layer residual prediction is to be applied to the enhancement layer block, generate a predicted residual for the enhancement layer block based on a residual for the collocated lower-layer block and generate a second-order residual for the enhancement layer block by comparing a calculated residual to the predicted residual. Other embodiments are described and claimed.