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公开(公告)号：US20230145358A1
公开(公告)日：2023-05-11
申请号：US17978890
申请日：2022-11-01
Applicant: Micron Technology, Inc.
Inventor： Jeffrey S. McNeil , Sivagnanam Parthasarathy , Kishore Kumar Muchherla , Patrick R. Khayat , Sead Zildzic , Violante Moschiano , James Fitzpatrick
IPC: G06F3/06
CPC classification number: G06F3/0611 , G06F3/0679 , G06F3/064
Abstract: A method includes receiving, by control logic of a memory device, a copyback clear command from a processing device; causing, in response to the copyback clear command, a page buffer to perform a dual-strobe read operation on first memory cells configured as single-level cells, the dual-strobe read operation including a soft strobe at a first threshold voltage and a hard strobe at a second threshold voltage that are sensed between threshold voltage distributions of the first memory cells; causing the page buffer to determine a number of one bit values within the threshold voltage distributions detected in a threshold voltage range between the first/second threshold voltages; and causing, in response to the number of one bit values not satisfying a threshold criterion, a copyback of data in the first memory cells to second memory cells configured as high-level cells without intervention from the processing device.
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公开(公告)号：US20230122275A1
公开(公告)日：2023-04-20
申请号：US18083992
申请日：2022-12-19
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Kishore Kumar Muchherla , Mustafa N. Kaynak , Sivagnanam Parthasarathy , Xiangang Luo , Peter Feeley , Devin M. Batutis , Jiangang Wu , Sampath K. Ratnam , Shane Nowell , Karl D. Schuh
Abstract: A method includes initiating a voltage calibration scan with respect to a block of a memory device, wherein the block is assigned to a first bin associated with a first set of read voltage offsets, and wherein the first bin is designated as a current bin, measuring a value of a data state metric for the block based on a second set of read voltage offsets associated with a second bin having an index value higher than the first bin, determining whether the value is less than a current value of the data state metric measured based on the first set of read voltage offsets, and in response to determining that the value is less than the current value, designating the second bin as the current bin.
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公开(公告)号：US20230060859A1
公开(公告)日：2023-03-02
申请号：US17462305
申请日：2021-08-31
Applicant: Micron Technology, Inc.
Inventor： Jonathan S. Parry , Jeffrey S. McNeil , Giuseppe Cariello , Kishore Kumar Muchherla , Reshmi Basu
Abstract: Methods, systems, and devices for overwriting at a memory system are described. A memory system may be configured to overwrite portions of a memory array with new data, which may be associated with omitting an erase operation. For example, write operations may be performed in accordance with a first demarcation configuration to store information at a portion of a memory array. A portion of a memory system may then determine to overwrite the portion of the memory array with different or updated information, which may include performing write operations in accordance with a second demarcation configuration. The second demarcation configuration may be associated with different cell characteristics for a one or more logic states, such as different distributions of stored charge or other cell property, different demarcation characteristics, different write operations, among other differences, which may support performing an overwrite operation without first performing an erase operation.
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公开(公告)号：US11594292B2
公开(公告)日：2023-02-28
申请号：US17238818
申请日：2021-04-23
Applicant: Micron Technology, Inc.
Inventor： Scott A. Stoller , Pitamber Shukla , Kishore Kumar Muchherla , Fulvio Rori , Bin Wang
Abstract: Described are systems and methods for providing power loss immunity in memory programming operations. An example memory device comprises: a memory array comprising a plurality of memory cells electrically coupled to a plurality of wordlines and a plurality of bitlines; and a controller coupled to the memory array, the controller to perform operations comprising: causing a programming pulse to be applied to to one or more wordlines of the memory array; responsive to determining that a threshold voltage of one or more memory cells of the memory array has reached a pre-program verify level, causing a first bias voltage level to be applied to a first subset of bitlines of the memory array and causing a second bias voltage level to be applied to a second subset of bitlines of the memory array.
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公开(公告)号：US20230019189A1
公开(公告)日：2023-01-19
申请号：US17952927
申请日：2022-09-26
Applicant: Micron Technology, Inc.
Inventor： Jiangang Wu , Jung Sheng Hoei , Qisong Lin , Kishore Kumar Muchherla
IPC: G06F3/06
Abstract: A processing device access a command to program data to a page in a block of a memory device. The processing device determines whether the page is a last remaining open page in the block. The processing device accesses a list that indicates enablement of a function to apply read level offsets to one or more open blocks in the memory device. The processing device determines the list includes an entry that matches to the block. The entry indicates enablement of the function to apply read level offsets to the block. The processing device disables the function based on determining the page is a last remaining open page in the block. The processing device adds the command to a prioritized queue of commands. The memory device executes commands from the prioritized queue in an order based on a priority level assigned to each command.
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Patent Agency Ranking
公开(公告)号：US20230012855A1
公开(公告)日：2023-01-19
申请号：US17943123
申请日：2022-09-12
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Michael Sheperek , Kishore Kumar Muchherla , Shane Nowell , Mustafa N. Kaynak , Larry J. Koudele
Abstract: A method can include receiving a request to read data from a block of a memory device, identifying a block family associated with the block of the memory device, identifying a voltage distribution parameter value associated with the block family, wherein the voltage distribution parameter value reflects an aggregate value of a corresponding voltage distribution associated with a plurality of memory cells of the block family, and determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block of the memory device. The block family can be identified using a data structure that maps block identifiers to corresponding block family identifiers. The voltage distribution parameter value can be identified using a data structure that maps block family identifiers to corresponding voltage parameter values.
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公开(公告)号：US20220351786A1
公开(公告)日：2022-11-03
申请号：US17868685
申请日：2022-07-19
Applicant: Micron Technology, Inc.
Inventor： Vamsi Pavan Rayaprolu , Kishore Kumar Muchherla , Peter Feeley , Sampath K. Ratnam , Sivagnanam Parthasarathy , Qisong Lin , Shane Nowell , Mustafa N. Kaynak
Abstract: A determination that a first programming operation has been performed on a particular memory cell can be made. A determination can be made, based on one or more threshold criteria, whether the particular memory cell has transitioned from a state associated with a decreased error rate to another state associated with an increased error rate. In response to determining that the particular memory cell has transitioned from the state associated with the decreased error rate to the another state associated with the increased error rate, an operation can be performed on the particular memory cell to transition the particular memory cell from the another state associated with the increased error rate to the state associated with the decreased error rate.
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公开(公告)号：US20220342813A1
公开(公告)日：2022-10-27
申请号：US17302064
申请日：2021-04-22
Applicant: Micron Technology, Inc.
Inventor： Kishore Kumar Muchherla , Giuseppina Puzzilli , Vamsi Pavan Rayaprolu , Ashutosh Malshe , James Fitzpatrick , Shyam Sunder Raghunathan , Violante Moschiano , Tecla Ghilardi
Abstract: A highly read data manager of a memory device receives a request to perform receives a request to perform a data relocation operation on a first wordline of a plurality of wordlines for a memory device, the memory device comprising a plurality of multi-level memory cells, wherein each multi-level memory cell comprises a plurality of pages; determines at the first wordline comprises data stored at one or more high read disturb pages of the plurality of pages; determines whether the data comprises a characteristic that satisfies a threshold criterion in relation to additional data stored on additional wordlines of the plurality of wordlines; responsive to determining that the data comprises the characteristic that satisfies the threshold criterion, identifies one or more low read disturb pages of the plurality of pages of a target wordline for relocating the data; and responsive to identifying the one or more low read disturb pages of the target wordline, stores at least a portion of the data at the one or more low read disturb pages of the target wordline.
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公开(公告)号：US20220319589A1
公开(公告)日：2022-10-06
申请号：US17217772
申请日：2021-03-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Shane Nowell , Steven Michael Kientz , Michael Sheperek , Mustafa N Kaynak , Kishore Kumar Muchherla , Larry J Koudele , Bruce A Liikanen
Abstract: A method can include receiving a request to read data from a block of a memory device coupled with a processing device, determining, using a data structure mapping block identifiers to corresponding voltage distribution parameter values, a voltage distribution parameter value associated with the block of the memory device, determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block, and reading, using the determined set of read levels, data from the block of the memory device.
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公开(公告)号：US11443830B1
公开(公告)日：2022-09-13
申请号：US17217780
申请日：2021-03-30
Applicant: MICRON TECHNOLOGY, INC.
Inventor： Michael Sheperek , Kishore Kumar Muchherla , Shane Nowell , Mustafa N Kaynak , Larry J Koudele
Abstract: A method can include receiving a request to read data from a block of a memory device coupled with a processing device, determining, using a first data structure mapping block identifiers to corresponding block family identifiers, a block family associated with the block of the memory device, determining, using a second data structure mapping block family identifiers to corresponding voltage distribution parameter values, a voltage distribution parameter value associated with the block family, determining a set of read levels associated with the voltage distribution parameter value, wherein each read level in the set of read levels corresponds to a respective voltage distribution of at least one memory cell comprised by the block of the memory device, and reading, using the determined set of read levels, data from the block of the memory device.
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