ACOUSTIC FIBER MEASUREMENT OF INTRAVASCULAR BLOOD
    31.
    发明申请
    ACOUSTIC FIBER MEASUREMENT OF INTRAVASCULAR BLOOD 审中-公开
    血管内皮细胞测量血管内皮细胞

    公开(公告)号:WO1992003971A1

    公开(公告)日:1992-03-19

    申请号:PCT/US1991006206

    申请日:1991-08-29

    Abstract: One or more acoustic fiber guides (725-1) are used to carry certain modes of acoustic energy to the tip of a disposable catheter. Using these fibers, reflected sound (Doppler Sound) measurements are made in a blood environment (701) without the risk to the patient associated with the use of an electrical transducer at the distal end of the catheter. Due to the size reduction provided, the Doppler probe is suitable for monitoring the blood flow in the coronary arteries. By the addition of optical fibers (725-2) tipped with specific dyes and excited by optical energy of appropriate wavelength, the catheter tip system can also be utilized simultaneously as a combined (integral) optical blood gas and pH monitor using optical fluorescence and an acoustic Doppler velocity transducer.

    DIGITAL DATA TAPE READING DEVICE
    32.
    发明申请
    DIGITAL DATA TAPE READING DEVICE 审中-公开
    数字数据读取设备

    公开(公告)号:WO1992002016A1

    公开(公告)日:1992-02-06

    申请号:PCT/GB1991001106

    申请日:1991-07-05

    CPC classification number: G06F3/0601 G06F2003/0698 G11B20/10

    Abstract: A digital tape reading device comprises a read head; a tape motor mechanism and an electronic buffer which is filled as data is read from the tape and which is emptied by feeding the data to associated equipment. Tape control equipment is provided to stop the tape and reposition it with respect to the head according to the data level in the buffer. On receipt of a buffer full signal the control equipment allows the tape to run on while not being read and to commence reading the tail of a block of data when buffer space is available. Then the tape is repositioned so as to read the missing head of the block while skipping the already read tail.

    INPUT DEVICE WITH TACTILE FEEDBACK
    33.
    发明申请
    INPUT DEVICE WITH TACTILE FEEDBACK 审中-公开
    输入设备与触发反馈

    公开(公告)号:WO1992000559A1

    公开(公告)日:1992-01-09

    申请号:PCT/GB1991000889

    申请日:1991-06-04

    CPC classification number: G06F3/016 G06F3/03545

    Abstract: A computer system comprising means for displaying output to the user and means for enabling a user to provide input by selecting positions on the input means characterised by means for providing tactile feedback to a user according to the selected positions.

    Abstract translation: 一种计算机系统,包括用于向用户显示输出的装置和用于使用户能够通过选择输入装置上的位置来提供输入的装置,其特征在于根据所选择的位置向用户提供触觉反馈的装置。

    PHASE SHIFTING CIRCUITS
    34.
    发明申请
    PHASE SHIFTING CIRCUITS 审中-公开
    相移电路

    公开(公告)号:WO1991020126A1

    公开(公告)日:1991-12-26

    申请号:PCT/GB1991000892

    申请日:1991-06-04

    CPC classification number: H03H17/08 H03H7/20

    Abstract: A phase shifter is implemented using varicap diodes (30) arranged in the form of a lumped element transmission line. A control unit (24) controls the reverse bias voltage of the diodes (30) to provide a delay which can be varied continuously over a given range. The arrangement can be used in conjunction with a digital phase shifter (10) which provides a delay which can be adjusted in predefined steps. The analog shifter (11) provides continuous variation over the step size of the digital shifter.

    HALOGENATED SURFACE WITH REDUCED PROTEIN INTERACTION
    35.
    发明申请
    HALOGENATED SURFACE WITH REDUCED PROTEIN INTERACTION 审中-公开
    具有降低蛋白质相互作用的HALOGENATED表面

    公开(公告)号:WO1989012225A1

    公开(公告)日:1989-12-14

    申请号:PCT/US1988001877

    申请日:1988-06-02

    CPC classification number: G01N27/44704

    Abstract: A method for treating a solid surface exposable to protein solutes is provided that reduces interactions of the protein solutes with the surface. Thus, a small bore capillary tube, useful for electrophoretic separation comprises a reduced interaction phase coated along the bore that includes a terminal moiety covalently bound in the reduced interaction phase through at least one heteroatom. This terminal moiety includes a plurality of halogen atoms, and preferably is an aryl pentafluoro.

    Abstract translation: 提供了一种治疗可暴露于蛋白质溶质的固体表面的方法,其减少蛋白质溶质与表面的相互作用。 因此,可用于电泳分离的小孔毛细管包括沿着孔涂覆的还原相互作用相,其包括通过至少一个杂原子在还原的相互作用相中共价结合的末端部分。 该末端部分包括多个卤素原子,优选为五氟芳基。

    APPARATUS AND METHOD FOR DAMPING HEAD POSITIONERS FOR DISK DRIVES
    36.
    发明申请
    APPARATUS AND METHOD FOR DAMPING HEAD POSITIONERS FOR DISK DRIVES 审中-公开
    用于阻止磁盘驱动器的头枕定位器的装置和方法

    公开(公告)号:WO1987002498A1

    公开(公告)日:1987-04-23

    申请号:PCT/US1986002201

    申请日:1986-10-16

    CPC classification number: G11B5/5521 G11B5/58

    Abstract: In order to improve servo system stability and decrease settling times in rotary head positioners for high performance magnetic disk drives, a floating mass damper (46) is mounted on the end of an accessing head arm structure (22-27) of the positioner opposite to the end or ends carrying the magnetic head or heads. The damper includes a spring centered floating mass (54) which rests on aviscous film (66), such as silicone oil, and the shear forces developed by motion of the floating mass across the film dissipates vibrational mode energy in the accessing head arm structure during both a fast seek operation followed by track following fine servo operation. Such energy dissipation thus reduces the settling time and amplitude of natural resonance of the head positioner.

    Abstract translation: 为了提高伺服系统的稳定性并减少用于高性能磁盘驱动器的旋转磁头定位器的稳定时间,浮动质量阻尼器(46)安装在定位器相对的定位头臂结构(22-27)的端部 端头或端部带有磁头或磁头。 阻尼器包括一个弹簧定位的浮动质量块(54),其位于诸如硅油的悬垂薄膜(66)上,并且通过浮动块体穿过薄膜的运动产生的剪切力消除了进入头臂结构中的振动模式能量 无论是快速寻道操作还是跟随精细伺服操作。 这样的能量耗散因此降低了头部定位器的自然共振的稳定时间和振幅。

    SYSTEM AND METHOD FOR DEPOSITING PLURAL THIN FILM LAYERS ON A SUBSTRATE
    37.
    发明申请
    SYSTEM AND METHOD FOR DEPOSITING PLURAL THIN FILM LAYERS ON A SUBSTRATE 审中-公开
    在基板上沉积多层薄膜层的系统和方法

    公开(公告)号:WO1986004617A1

    公开(公告)日:1986-08-14

    申请号:PCT/US1986000270

    申请日:1986-02-06

    Abstract: A sealed substrate processing path has a plural selectably isolatable vacuum deposition chambers (12, 14, 16, 18, 20 and 22) along the path. A transporter carries substrates along the path and an independently controllable sputter deposition is performed in each deposition chamber (14, 16, 18, and 20) on substrate therein. Substrates are loaded from a load chamber (12) to a first deposition chamber (14) while vacuum is maintained in the first deposition chamber (14) and load chamber (12). Substrates are transferred from a last deposition chamber (20) to an unloaded chamber (22) while a vacuum is maintained in the last (20) and unload (22) chambers. Substrates are placed in the load chamber (12) while the load (12) and first (14) chamber are isolated and are removed from the unload chamber (22) while the last (20) and unload (22) chambers are isolated. In one embodiment, substrates travel successively from the load chamber (12) to first (14) through fourth (20) deposition chambers and then to unload chamber (22). In another embodiment, substrates travel from the load chamber (12) to first (14) to second (16) to first (14) and to third (18) deposition chambers and then to the unload chamber (22).

    METHOD AND APPARATUS FOR STORING AND EXPANDING PROGRAMS FOR VLIW PROCESSOR ARCHITECTURES
    39.
    发明申请
    METHOD AND APPARATUS FOR STORING AND EXPANDING PROGRAMS FOR VLIW PROCESSOR ARCHITECTURES 审中-公开
    用于存储和扩展VLIW处理器架构的程序的方法和装置

    公开(公告)号:WO1998027486A1

    公开(公告)日:1998-06-25

    申请号:PCT/US1997022814

    申请日:1997-12-12

    Abstract: Method and apparatus for storing and expanding wide instruction words in a computer system are provided. The computer system includes a memory and an instruction cache. Compressed instruction words of a program are stored in a code heap segment of the memory, and code pointers are stored in a code pointer segment of the memory. Each of the code pointers contains a pointer to one of the compressed instruction words. Part of the program is stored in the instruction cache as expanded instruction words. During execution of the program, an instruction word is accessed in the instruction cache. When the instruction word required for execution is not present in the instruction cache, thereby indicating a cache miss, a code pointer corresponding to the required instruction word is accessed in the code pointer segment of memory. The code pointer is used to access a compressed instruction word corresponding to the required instruction word in the code heap segment of memory. The compressed instruction word is expanded to provide an expanded instruction word, which is loaded into the instruction cache and is accessed for execution.

    Abstract translation: 提供了用于在计算机系统中存储和扩展宽指令字的方法和装置。 计算机系统包括存储器和指令高速缓存。 程序的压缩指令字存储在存储器的代码堆段中,代码指针存储在存储器的代码指针段中。 每个代码指针包含指向一个压缩指令字的指针。 程序的一部分作为扩展指令字存储在指令缓存中。 在程序执行期间,指令缓存中存取指令字。 当指令高速缓存中不存在执行所需的指令字,从而指示高速缓存未命中时,在存储器的代码指针段中访问与所需指令字对应的代码指针。 代码指针用于访问与存储器的代码堆段中所需指令字相对应的压缩指令字。 压缩指令字被扩展以提供扩展指令字,其被加载到指令高速缓存中并被访问以执行。

    METHOD AND APPARATUS FOR PROTECTING MEMORY-MAPPED DEVICES FROM SIDE EFFECTS OF SPECULATIVE INSTRUCTIONS
    40.
    发明申请
    METHOD AND APPARATUS FOR PROTECTING MEMORY-MAPPED DEVICES FROM SIDE EFFECTS OF SPECULATIVE INSTRUCTIONS 审中-公开
    用于保护存储器映射设备的方法和装置从分析说明书的边界效应

    公开(公告)号:WO1998027485A1

    公开(公告)日:1998-06-25

    申请号:PCT/US1997022643

    申请日:1997-12-12

    CPC classification number: G06F12/1441 G06F9/3842 G06F9/3879

    Abstract: A computer system includes a CPU for executing conventional instructions and speculative instructions, and a memory controller coupled to a system bus. In response to an access operation by one of the instructions, the CPU generates a speculative instruction bit and a corresponding access address. The access address represents a location in a global address space which includes a first address space and a second address space. The speculative instruction bit is asserted when the corresponding access address is generated by a speculative instruction. The memory controller discards the access operation when the speculative instruction bit is asserted and the access address is in the second address space. Thus, the speculative instruction is prevented from accessing the second address space. In one embodiment, the computer system includes a memory coupled to the system bus and mapped to the first address space, and an I/O device coupled to the system bus and mapped to the second address space. The speculative instruction is prevented from accessing the I/O device.

    Abstract translation: 计算机系统包括用于执行常规指令和推测指令的CPU以及耦合到系统总线的存储器控​​制器。 响应于指令之一的访问操作,CPU产生推测指令位和相应的访问地址。 访问地址表示全局地址空间中包含第一地址空间和第二地址空间的位置。 当相应的访问地址由推测指令生成时,推测指令位被置位。 当推测指令位被置位并且访问地址位于第二地址空间时,存储器控制器丢弃访问操作。 因此,防止推测指令访问第二地址空间。 在一个实施例中,计算机系统包括耦合到系统总线并映射到第一地址空间的存储器以及耦合到系统总线并被映射到第二地址空间的I / O设备。 禁止推测指令访问I / O设备。

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