公开(公告)号：EP2329495A1

公开(公告)日：2011-06-08

申请号：EP09791581.3

申请日：2009-08-17

Applicant: QUALCOMM Incorporated

Inventor： CHEN, Nan ,  ZHONG, Cheng ,  CHABA, Ritu

IPC: G11C7/10 ,  G11C7/20 ,  G11C7/22 ,  G11C11/417

CPC classification number: G11C7/1006 ,  G11C7/04 ,  G11C7/20 ,  G11C7/22 ,  G11C11/413

Abstract: A system and method reduce stress caused by NBTI effects by determining if a trigger event has occurred and if so inverting all input data values to the memory and all output data values from the memory during a period of time defined by the determined trigger event. In one embodiment, the trigger event is an alternate memory power-up.

公开(公告)号：EP2263235A1

公开(公告)日：2010-12-22

申请号：EP09718990.6

申请日：2009-02-27

Applicant: QUALCOMM Incorporated

Inventor： JUNG, Changho ,  ZHONG, Cheng

IPC: G11C7/22 ,  G11C8/16

CPC classification number: G11C7/1072 ,  G11C7/22

Abstract: A pseudo-dual port memory address multiplexing system includes a control circuit (103) operative to identify a read request and a write request to be accomplished during a single clock cycle. A self time tracking circuit (105) monitors a read operation and generates a switching signal (WCLK) when the read operation is determined to be complete. A multiplexer (104) is responsive to the switching signal for selectively providing a read address and a write address to a memory address unit at the proper time.

Abstract translation: 伪双端口存储器地址多路复用系统包括控制电路，其操作以识别在单个时钟周期期间要完成的读请求和写请求。 自动跟踪电路监视读取操作，并且当读取操作被确定为完成时产生切换信号。 复用器响应于切换信号，用于在适当的时间选择性地向存储器地址单元提供读取地址和写入地址。

公开(公告)号：EP4406120A1

公开(公告)日：2024-07-31

申请号：EP22789730.3

申请日：2022-09-08

Applicant: QUALCOMM INCORPORATED

Inventor： YE, Jianwen ,  SUN, Bo ,  ZHONG, Cheng

IPC: H03L7/081 ,  H03L7/24

CPC classification number: H03L7/24 ,  H03L7/0814

公开(公告)号：EP2486468B1

公开(公告)日：2018-11-14

申请号：EP10775953.2

申请日：2010-10-07

Applicant: Qualcomm Incorporated

Inventor： ZHONG, Cheng ,  DANG, Nam, V. ,  VUONG, Hung, Q. ,  KONG, Xiaohua

IPC: G06F1/32 ,  H04N5/775

CPC classification number: G06F1/3278 ,  G06F1/1632 ,  G06F1/266 ,  G06F1/3203 ,  G06F1/3206 ,  G06F1/3281 ,  G06F11/2289 ,  G06F11/3041 ,  G06F11/3048 ,  G06F11/3051 ,  G06F11/3089 ,  G06F13/4022 ,  G06F13/4081 ,  Y02D10/151 ,  Y10T307/76

Abstract: Power saving for hot plug detect (HPD) is disclosed. In a particular embodiment, a method includes detecting, at a source device that is connectable to a sink device, a connection of the source device to the sink device via a connector. The source device includes a DC voltage source and the connection is detected without consuming power from the DC voltage source.

公开(公告)号：EP2374129B1

公开(公告)日：2016-11-16

申请号：EP09793651.2

申请日：2009-12-07

Applicant: QUALCOMM Incorporated

Inventor： PARK, Dongkyu ,  DAVIERWALLA, Anosh B. ,  ZHONG, Cheng ,  ABU-RAHMA, Mohamed Hassan Soliman ,  YOON, Sei Seung

IPC: G11C7/06 ,  G11C7/22 ,  G11C11/16

CPC classification number: G11C7/22 ,  G11C7/06 ,  G11C11/1673 ,  G11C11/1693 ,  G11C2207/065 ,  G11C2207/2281

公开(公告)号：EP2777157A2

公开(公告)日：2014-09-17

申请号：EP12798939.0

申请日：2012-11-12

Applicant: Qualcomm Incorporated

Inventor： ZHONG, Cheng ,  NAVUBOTHU, Swarna L. ,  DANG, Nam V. ,  KONG, Xiaohua

IPC: H03L7/089 ,  H03L7/06

CPC classification number: H03L7/0893

Abstract: A method includes tracking a tuning voltage at a first circuit coupled to a first drain node of a first supply of a charge pump. The method also includes tracking the tuning voltage at a second circuit coupled to a second drain node of a second supply of the charge pump. The method further includes stabilizing a first voltage of the first drain node and a second voltage of the second drain node responsive to the tuning voltage.

公开(公告)号：EP3120513B1

公开(公告)日：2018-04-25

申请号：EP15712766.3

申请日：2015-03-12

Applicant: Qualcomm Incorporated

Inventor： KONG, Xiaohua ,  ZHONG, Cheng ,  NAVUBOTHU, Swarna Latha

IPC: H04L25/02 ,  H04L25/14

CPC classification number: G06F1/04 ,  G11C11/4076 ,  H03K5/01 ,  H03K2005/00013 ,  H04L25/0292 ,  H04L25/14

Abstract: A clock generator is provided that is immune to skew between bits in digital words generated by a multi-phase receiver.

公开(公告)号：EP2245630B1

公开(公告)日：2013-05-01

申请号：EP08861010.0

申请日：2008-12-19

Applicant: QUALCOMM Incorporated

Inventor： YOON, Sei, Seung ,  ZHONG, Cheng ,  PARK, Dongkyu ,  ABU-RAHMA, Mohamed, H.

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/1659 ,  G11C11/1673

公开(公告)号：EP2382633A1

公开(公告)日：2011-11-02

申请号：EP10700196.8

申请日：2010-01-08

Applicant: QUALCOMM Incorporated

Inventor： ABU-RAHMA, Mohamed, Hassan ,  SONG, Seung-Chul ,  YOON, Sei, Seung ,  PARK, Dongkyu ,  ZHONG, Cheng ,  DAVIERWALLA, Anosh, B.

IPC: G11C11/16

CPC classification number: G11C11/1675 ,  G11C11/1657 ,  G11C11/1659 ,  G11C11/1673

Abstract: A system and method to read and write data in magnetic random access memories are disclosed. In a particular embodiment, a device (100) includes a spin transfer torque magnetic tunnel junction (STT-MT J) element (102) and a transistor (104) with a first gate (106) and a second gate (108) coupled to the STT-MTJ element.

公开(公告)号：EP2241008A1

公开(公告)日：2010-10-20

申请号：EP09700763.7

申请日：2009-01-09

Applicant: QUALCOMM Incorporated

Inventor： RAO, Hari M. ,  ZHONG, Cheng ,  CHEN, Zhiqin

IPC: H03K3/037

CPC classification number: H03K3/037

Abstract: A circuit device includes a first input to receive a reset control signal and a second input coupled to an output of a latch. The circuit device also includes a logic circuit adapted to conditionally reset the latch based on a state of the output in response to receiving the reset control signal.