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公开(公告)号：SE7510536A
公开(公告)日：1976-03-29
申请号：SE7510536
申请日：1975-09-19
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
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公开(公告)号：NO744473L
公开(公告)日：1975-08-25
申请号：NO744473
申请日：1974-12-11
Applicant: RCA CORP
Inventor： LIMBERG LEROY A , STECKLER S A
Abstract: A dual mode deflection synchronizing system includes a resettable counter which generates noise-free internal synchronizing signals and signals representative of the interval during which external vertical synchronizing signals should be received provided the counter is properly synchronized. A sync signal verification detector is coupled to the source of external vertical sync signals and to a mode switch so that if the external signals arrive during this prediction interval as determined by the sync signal verification detector the system continues to operate in a synchronized mode on its internally generated synchronizing signals. If the external signals do not arrive during this prediction interval, the mode switch switches the system into a non-synchronized mode. A vertical sync signal detector which is also coupled to the source of external sync signals and to the mode switch begins to search for an external signal which has the time duration characteristic of an authentic external synchronizing signal. Until such a signal is received, the system continues to be synchronized by internal synchronizing signals generated by the resettable counter. When such a signal is received, the vertical sync signal detector resets the counter to correct its synchronization with the received external vertical synchronizing signal and toggles the mode switch to return the system to its synchronized mode of operation.
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公开(公告)号：BE776064A
公开(公告)日：1972-03-16
申请号：BE776064
申请日：1971-11-30
Applicant: RCA CORP
Inventor： STECKLER S A
Abstract: A dual mode automatic phase controlled oscillator system employs multiple keyed phase comparators to produce control signals which are applied to lock the oscillator frequency and phase to a reference signal. One of the keyed comparators is continuously employed to produce an in-sync control signal. A coincidence gate is utilized to detect the existence of out-of-sync conditions, and associated circuitry produces a mode control signal which is applied to activate the second keyed phase comparator upon such occurrence. The second keyed comparator is thereby selectively operative during out-of-sync conditions to develop an additional control signal to enhance the pull-in characteristics of the system.
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公开(公告)号：SE452837B
公开(公告)日：1987-12-14
申请号：SE8300804
申请日：1983-02-15
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
Abstract: An automatic gain control arrangement is provided for an analog to digital (A/D) converter in a television signal processing system. A gain-controlled source of analog signals applies a video information signal to the input of an A/D converter. The A/D converter produces digitized video signal samples at an output which is coupled to a digital peak detector. The digital peak detector detects the level of the digital samples of the synchronizing signal components. The detected sync signal level is compared with a desired value or range of values. If the detected sync signal level is not at the desired level or is outside the desired range, the count of a counter is incremented or decremented accordingly. The count of the counter is converted to an analog voltage which is applied to the gain-controlled signal source to control the level of the analog signal applied to the A/D converter. The analog voltage may also be combined with a control voltage produced by an analog peak detector, which detects the level of the input signal to the A/D converter, to produce a composite gain control signal.
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Patent Agency Ranking
公开(公告)号：SE8300804L
公开(公告)日：1983-08-23
申请号：SE8300804
申请日：1983-02-15
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
Abstract: An automatic gain control arrangement is provided for an analog to digital (A/D) converter in a television signal processing system. A gain-controlled source of analog signals applies a video information signal to the input of an A/D converter. The A/D converter produces digitized video signal samples at an output which is coupled to a digital peak detector. The digital peak detector detects the level of the digital samples of the synchronizing signal components. The detected sync signal level is compared with a desired value or range of values. If the detected sync signal level is not at the desired level or is outside the desired range, the count of a counter is incremented or decremented accordingly. The count of the counter is converted to an analog voltage which is applied to the gain-controlled signal source to control the level of the analog signal applied to the A/D converter. The analog voltage may also be combined with a control voltage produced by an analog peak detector, which detects the level of the input signal to the A/D converter, to produce a composite gain control signal.
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公开(公告)号：SE8300804D0
公开(公告)日：1983-02-15
申请号：SE8300804
申请日：1983-02-15
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
Abstract: An automatic gain control arrangement is provided for an analog to digital (A/D) converter in a television signal processing system. A gain-controlled source of analog signals applies a video information signal to the input of an A/D converter. The A/D converter produces digitized video signal samples at an output which is coupled to a digital peak detector. The digital peak detector detects the level of the digital samples of the synchronizing signal components. The detected sync signal level is compared with a desired value or range of values. If the detected sync signal level is not at the desired level or is outside the desired range, the count of a counter is incremented or decremented accordingly. The count of the counter is converted to an analog voltage which is applied to the gain-controlled signal source to control the level of the analog signal applied to the A/D converter. The analog voltage may also be combined with a control voltage produced by an analog peak detector, which detects the level of the input signal to the A/D converter, to produce a composite gain control signal.
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公开(公告)号：SE8204613L
公开(公告)日：1983-02-15
申请号：SE8204613
申请日：1982-08-06
Applicant: RCA CORP
Inventor： STECKLER S A , CHRISTOPHER L A
IPC: H03H17/06
Abstract: A controllable shift matrix has inputs and outputs and is responsive to bits of an input signal word X(n) at the inputs of ascending order from a least significant bit position to a most significant bit position for controllably producing an output (weighted X(n) the outputs in which the input signal bits may occupy respectively different bit positions. The matrix comprises a plurality of sections (80-88) including at least one divide-by section (82) coupled between the inputs and outputs and including controlled switch means responsive to control signals (C1 ,C1) for selectively passing bits on divide-by input lines to divide-by output lines of the same order as said divide-by input line bit position, or transferring said divide-by input line bits to respective ones of said divide-by output lines which are more than one bit position lower in order than divide-by input line bit positions. A weighting function circuit comprises two such matrices which commonly receive the input word for shifting it in different ways, and a combining circuit for combining the shifted words produced by the matrices to produce a weighted word (Fig. 2 not shown). A digital filter comprises the weighting function circuit allowing reduced complexity and higher speed in coefficient multiplication.
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公开(公告)号：DK145400B
公开(公告)日：1982-11-08
申请号：DK436075
申请日：1975-09-26
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
Abstract: Cascaded multipliers are coupled to a source providing a periodic sawtooth deflection waveform, the amplitude of which varies with variations in the high voltage applied to an accelerating anode of a kinescope. The sawtooth signal is cubed by the cascaded multipliers and multiplied by the inverse square of a voltage which varies with changes in the kinescope anode potential. The system thus incorporates S-correction and means for correcting the deflection waveform to compensate for changes in the high voltage supplied to the kinescope anode.
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公开(公告)号：SE409394B
公开(公告)日：1979-08-13
申请号：SE7510536
申请日：1975-09-19
Applicant: RCA CORP
Inventor： STECKLER S A , BALABAN A R
Abstract: Cascaded multipliers are coupled to a source providing a periodic sawtooth deflection waveform, the amplitude of which varies with variations in the high voltage applied to an accelerating anode of a kinescope. The sawtooth signal is cubed by the cascaded multipliers and multiplied by the inverse square of a voltage which varies with changes in the kinescope anode potential. The system thus incorporates S-correction and means for correcting the deflection waveform to compensate for changes in the high voltage supplied to the kinescope anode.
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