公开(公告)号：JP2001346201A

公开(公告)日：2001-12-14

申请号：JP2000205115

申请日：2000-07-06

Applicant: SONY CORP

Inventor： HASHIMOTO YASUHIRO ,  TAKASHIMA MASATOSHI ,  NARITA HIDEYUKI ,  HIRANAKA DAISUKE

IPC: G06T9/00 ,  H04N19/00 ,  H04N19/103 ,  H04N19/134 ,  H04N19/174 ,  H04N19/177 ,  H04N19/196 ,  H04N19/423 ,  H04N19/91 ,  H04N7/24

Abstract: PROBLEM TO BE SOLVED: To provide an image coder that users a plurality of PMEG2-MP ML coders so as to encode an HDTV signal with high image quality under a simple control. SOLUTION: An image divider 110 divides a received image into four, which are fed to division image coders 120-i (i=1-4) and an allocation bit rate arithmetic section 171 sets a bit rate to each division image coder 120-i on the basis of a generated code amount of a preceding frame or the like. In this case, the total sum of the bit rates with respect to the 4 division image coders is made constant. In each division image coder 120-i, each MP ML encodes the divided image based on a bit rate, and a video stream integrator 160 integrates the coded images to generate and output an MP HL video stream.

公开(公告)号：JP2001333196A

公开(公告)日：2001-11-30

申请号：JP2000319640

申请日：2000-10-19

Applicant: SONY CORP

Inventor： NARITA HIDEYUKI ,  ITO YOSHIYUKI ,  TAKASHIMA MASATOSHI ,  MURAYAMA AKIYOSHI ,  HIRANAKA DAISUKE

IPC: G06F13/00 ,  H04L12/18 ,  H04L29/06 ,  H04L29/08 ,  H04M3/56

Abstract: PROBLEM TO BE SOLVED: To provide a communication controller that can simplify the procedure and the operations to take part in party communication. SOLUTION: Upon the receipt of a request POR to invite a designated terminal to take part in inter-multi-point communication with information designating terminals 1052-1054 via a communication channel, a server unit 103 transmits an inquiry PAI denoting whether or not the designated terminal intends to take part in the inter-multi-point communication to the designated terminal via a communication channel, and the server 103 controls the inter-multi-point communication among terminals including the designated terminal when receiving a reply PAA denoting the participation of the designated terminal in the inter-multi-point communication via a communication channel from the designated terminal.

公开(公告)号：JPH11252058A

公开(公告)日：1999-09-17

申请号：JP4807698

申请日：1998-02-27

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI

IPC: H04N5/928 ,  H04J3/00 ,  H04L5/00 ,  H04N5/91 ,  H04N7/08 ,  H04N7/081 ,  H04N7/24 ,  H04N19/00 ,  H04N19/423 ,  H04N19/59 ,  H04N19/70

Abstract: PROBLEM TO BE SOLVED: To provide a multiplexing device and a method which will not cause a step-out even when at least one of plural input signals has jitters or an input signal has disturbance. SOLUTION: A controller 6 calculates a time (time stamp) to start the reproduction or decoding of video data based on a time interval including a fluctuation component that is caused by jitters between AUs(access units) from a video encoder 3 and also on the identification information (input frame numbers) on these AUs. A multiplexed 7 adds the above time stamp calculated by the controller 6 to each AU and then multiplexes the time stamp of the AU with the AU from an audio encoder 5.

公开(公告)号：JPH11243546A

公开(公告)日：1999-09-07

申请号：JP4411198

申请日：1998-02-25

Applicant: SONY CORP

Inventor： OGURA HIDEFUMI ,  TAKASHIMA MASATOSHI ,  HIRANAKA DAISUKE ,  MIURA TAKESHI

IPC: H04N19/50 ,  G06T9/00 ,  H04N19/105 ,  H04N19/139 ,  H04N19/159 ,  H04N19/16 ,  H04N19/172 ,  H04N19/176 ,  H04N19/42 ,  H04N19/423 ,  H04N19/51 ,  H04N19/57 ,  H04N7/32

Abstract: PROBLEM TO BE SOLVED: To enhance the image quality by setting properly a search range so as to predict a motion with high accuracy, even if a large motion takes place, a time change of a moving speed is irregular, acceleration, or deceleration takes place. SOLUTION: A stored retrieval field 102 in a memory 1 is given to a simple motion detection circuit 2. The simple motion detection circuit 2 outputs a movement amount 105 and is given to a control discrimination circuit 4. A motion detection circuit 3 receives a current frame 103 and a retrieval frame 104, to obtain a final motion vector 107 used actually for motion compensation. The control discrimination circuit 4 gives a setting parameter 106 for a search range depending on a predicted motion amount, by the simple moving vector 105 to the motion detection circuit 3, where the search range is set.

公开(公告)号：JPH0974566A

公开(公告)日：1997-03-18

申请号：JP22645995

申请日：1995-09-04

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI

IPC: H04N5/92 ,  G06T9/00 ,  H04N5/85 ,  H04N5/937 ,  H04N7/52 ,  H04N9/804 ,  H04N19/50 ,  H04N7/32

Abstract: PROBLEM TO BE SOLVED: To realize a compression encoder reduced in cost by remarkably reducing memory scale. SOLUTION: A storage means 102 stores the input video signal consisting of plural pictures. A changed point detection means 101 detects the changed point of the input video signal. An encoding means 106 performs a fixed length encoding for the picture stored in a storage means 102 and generates a bit stream. A timing control means 105 determines the picture group including at least one sheet of intrapicture based on the detection result of the changed point detection means 101 and controls the processing timing that the fixed length encoding is performed for each picture within the picture group by the encoding means 106. A rate control means 7 defines the range of the code generation rate in the encoding means 106 as the next picture of the intrapicture to the next intrapicture based on the detection result of the changed point detection means 101 and the control of the timing control means 105, and controls the range of the code generation rate so as to assign the encoding information capacity which is preliminarily assigned to the intrapicture to another picture, when a scene change is detected.

公开(公告)号：JPH06205354A

公开(公告)日：1994-07-22

申请号：JP33467992

申请日：1992-12-15

Applicant: SONY CORP

Inventor： NITTA HAJIME ,  TAKASHIMA MASATOSHI ,  OTSUKI TOMOYUKI

IPC: G11B20/10 ,  G11B27/034 ,  G11B27/036 ,  H04N5/765 ,  H04N5/781 ,  H04N5/907 ,  H04N5/91

Abstract: PURPOSE:To easily execute after-recording and rewrite of an audio signal. CONSTITUTION:A video signal from an input terminal 1 is fed to a motion compensation inter-frame prediction circuit 2, a discrete cosine transformation(DCT) circuit 3, a quantization circuit 4, a variable length coding(VLC) circuit 5, a video multiplexer coder 7, a buffer 8, and a system multiplexer coder 9, and each time stamp(TS) from an input terminal 13 is fed to the coder 9. Then a signal from the coder 9 is fed to a recording coding circuit 14, in which a prescribed recording signal is recorded on a recording medium such as a disk 15. A semiconductor (IC) memory 16 is provided in the disk 15 in addition. Furthermore, an audio signal from the input terminal 17 is fed to an IC memory controller 19 through an audio coder 18 and each time stamp (TS) from the input terminal 21 is fed to the controller 19. Then each signal is written in the semiconductor memory 16 by the controller 19.

公开(公告)号：JPH06178323A

公开(公告)日：1994-06-24

申请号：JP33051992

申请日：1992-12-10

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI ,  OTSUKI TOMOYUKI

IPC: H04N19/126 ,  H04N7/24 ,  H04N11/04 ,  H04N19/00 ,  H04N19/136 ,  H04N19/176 ,  H04N19/186 ,  H04N19/189 ,  H04N19/196 ,  H04N19/423 ,  H04N19/503 ,  H04N19/51 ,  H04N19/61 ,  H04N19/625 ,  H04N19/85 ,  H04N19/86 ,  H04N19/91 ,  H04N7/13

Abstract: PURPOSE:To improve picture quality without increasing a transmission rate or to uniformize picture quality so as to decrease the transmission rate. CONSTITUTION:A luminance signal (Y) supplied to an input terminal 1 is supplied to a block circuit 3 through an A/D converter 2, and is converted into the processing block of 8X8 (picture elements), for example. The signal which is made into a block is supplied to a DCT circuit 4 and a signal which is made into DCT is supplied to a variable length encoding circuit 6 through a quantizing circuit 5. A signal whose variable length is encoded is fetched by an output terminal 7. The signal which is made into DCT from the DCT circuit 4 is supplied to a DC detection circuit 8 and a value Qs corresponding to a detected DC value is supplied to the quantizing circuit 5 and the variable length encoding circuit 6. Thus, the width of steps in quantization in the quantizing circuit 5 is changed.

公开(公告)号：JPH05316464A

公开(公告)日：1993-11-26

申请号：JP14667392

申请日：1992-05-12

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI ,  OIKAWA YUKA

IPC: G11B20/02 ,  G11B20/22 ,  H04N5/205 ,  H04N5/92 ,  H04N5/922

Abstract: PURPOSE:To obtain a high grade image even if emphasis/de-emphasis is executed in VTR, etc., by providing an overflow limiter within a negative feedback circuit and making it hard to generate waveform distortion even at the time of nonliner-processing a digital signal. CONSTITUTION:At the time of recording, data delayed by one clock by a delay circuit 12 is delayed by one clock by a delay circuit 13 and inputted into an adder 7. The adder 7 digital-adds the output from a delay circuit 11 of a feedback circuit and the output of the delay circuit 13. But, emphasis processing 15 is executed at the time of recording in a state where the coefficient K of an amplifier 3 is positive at the time of emphasis and negative at the time of de-emphasis. Next, at the time of reproducing, a digitalized chroma signal is inputted to a subtracter 6 and data is fed-back from the output of the overflow limiter 5, passes a switch 1, a 1H delay circuit 2 and a delay circuit 10, and is added with the outputs of the delay circuits 12 and 13. Thus, it is made hard to generate waveform distortion even at the time of nonliner processing the digital signal.

公开(公告)号：JPH05303840A

公开(公告)日：1993-11-16

申请号：JP10622992

申请日：1992-04-24

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI ,  OIKAWA YUKA

IPC: G11B20/06 ,  G11B20/24 ,  H04B1/62 ,  H04N5/92 ,  H04N5/93

Abstract: PURPOSE:To prevent the occurrence of waveform distortions in output digital signals regardless of the amplitudes of high frequency components by varying the pass band characteristics of an HPF in accordance with the amplitudes of pre-emphasis high region components in digital video signals. CONSTITUTION:From an HPF 81, a high region component DHB' is obtained in digital video signals DVA which are nonlinear emphasis processed from an input terminal 31 and at a peak level hold section 82, signals DPB, which correspond to the peak level of high region component DHB', are obtained. A control signal transmitting section 83 supplies control signals DCK, which correspond to the amplitudes of DHB', to a first stage forming section 39 of an HPF 33 and level adjustment section 43 and 48 of a second stage forming section 40. By this, the value of a level control coefficient K2 of the sections 43 and 48 is controlled and the pass band characteristics of the HPF 33 are varied. Therefore, the waveform distortions of output digital video signals DV' are reduced regardless of the amplitudes of digital signal high frequency components.

公开(公告)号：JPH05300472A

公开(公告)日：1993-11-12

申请号：JP9993292

申请日：1992-04-20

Applicant: SONY CORP

Inventor： TAKASHIMA MASATOSHI ,  OIKAWA YUKA

IPC: G11B20/06 ,  H04N5/205 ,  H04N5/92 ,  H04N5/93

Abstract: PURPOSE:To improve a S/N without complicating a constitution and making a circuit a large sized by performing a de-emphasis processing and the level reduction of high-frequency components for the digital video signal for which an emphasis processing is performed in the same circuit. CONSTITUTION:The high-frequency components are taken out from an inputted digital video signal DVE for which an emphasis processing is performed in an HPF 43 and the levels of the high-frequency components are adjusted in a level adjustment part 44. The levels of the part exceeding a prescribed level of these high-frequency components whose levels are adjusted are limited by a level limiter 45 and the output of the limiter 45 is subtracted from the signal DVE. At this time, by the selection of the level control factor in the adjustment part 44 and the input-output level characteristic in the limiter 45, the de-emphasis processing and the removal of the high-frequency components for the signal for which an input emphasis processing is performed are performed in a circuit. The whole of S/N is possible to be improved without complicating a constitution and making the device a large-sized as compared with the case where a de-emphasis processing circuit and a picture quality correction circuit are independently provided.