32.
    发明专利
    未知

    公开(公告)号:DE60201023T2

    公开(公告)日:2005-08-18

    申请号:DE60201023

    申请日:2002-04-04

    Abstract: The invention concerns a circuit ( 1 ) for storing a binary code (B 1 , B 2 , Bi- 1 , Bi, Bn- 1 , Bn) in an integrated circuit chip, comprising an input terminal ( 2 ) applying a signal (E) triggering reading of the code, output terminals ( 31, 32, 3 i-1, 3 i, 3 n-1, 3 n) for delivering said binary code, first electrical paths (P 1 , P 2 , Pi, Pn) individually connecting said input terminal to each output terminal, each path inputting a fixed delay in the manufacture of the integrated circuit, and means ( 4, 51, 52, 5 i, 5 n) simultaneously integrating the binary states present in output of the electrical paths.

    34.
    发明专利
    未知

    公开(公告)号:FR2846791A1

    公开(公告)日:2004-05-07

    申请号:FR0213690

    申请日:2002-10-31

    Abstract: A resistive element controllable to irreversibly decrease its value, including several polysilicon resistors connected in series between two input/output terminals of the resistive lemen; and an assembly of switches, connected to turn the series connection into a parallel association of said resistors between two programming terminals intended to receive a supply voltage.

    38.
    发明专利
    未知

    公开(公告)号:FR2792136B1

    公开(公告)日:2001-11-16

    申请号:FR9904549

    申请日:1999-04-07

    Abstract: A terminal (40) and a transponder (10) contain a corresponding oscillating circuit (Li,Ci,24,L2,C2). An AM transmission of a signal sends a boundary-mark toward the transponder a signal (Rx) undergo a phase demodulation in the boundary-mark. The depth o modulation (tm) of the amplitude is lower than 100%. An Independent claim is included for: (a) a terminal for performing a claimed method (b) a transponder

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