公开(公告)号：DE69628518D1

公开(公告)日：2003-07-10

申请号：DE69628518

申请日：1996-08-27

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: H03M13/23 ,  H03M13/00

Abstract: The decode includes a number of addition-comparison-selection cells (ACS) each presenting an extension (11) which generates R-bit decisions based on one-bit decisions. The register exchange method is used for this process. The complex R-bit decisions are stored in a memory (20) so that they can be re-mounted in reverse according to the trace back method. The memory reading rate can thus be reduced by a factor R, while its writing rate depends of the size of its bus. Each cell extension includes a decision register (22) controlled by a clock signal (CR) and feeding a multiplexer controlled by a decision (d) generated by the cell.

公开(公告)号：DE69904977D1

公开(公告)日：2003-02-27

申请号：DE69904977

申请日：1999-03-19

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: H03L7/093 ,  H03L7/10 ,  H04L27/233 ,  H04L27/38

公开(公告)号：DE69526887D1

公开(公告)日：2002-07-11

申请号：DE69526887

申请日：1995-08-02

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: G06F11/10 ,  G06F7/72 ,  H03M13/00

Abstract: A number (x) of n bits belonging to a Galois group of 2n = N + 1 elements is fed to a unit (10) which raises it to a power t = 2n/2. The raised number (x ) and the original number (x) are multiplied together in a multiplier (12). The product (x ) is inverted in an inversion unit (INV) (14) to form the reciprocal (x t ). This quantity is supplied to a further multiplier (16) together with the raised number (x ) to produce x = x which is the required number.

公开(公告)号：DE69900141D1

公开(公告)日：2001-07-19

申请号：DE69900141

申请日：1999-02-09

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: G06F13/40

Abstract: Two bus sections (SDA1,SDA2) operating at different voltages (DT1,DT2) may be connected for two way traffic by using a logic module (CL) which consists of interconnected NOR logic gates and voltage impressing transistors (20,21). The two sections of transmission bus may be connected or disconnected by a memory circuit (MEM) which controls a conditional signal sent to the logic module (CL).

公开(公告)号：FR2790344B1

公开(公告)日：2001-05-18

申请号：FR9902653

申请日：1999-02-26

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: H04L25/03 ,  H04L27/26 ,  H04J11/00 ,  G06F17/14 ,  H03K9/06

Abstract: A COFDM demodulator including a fast Fourier transform circuit analyzing a received signal in a window corresponding to one symbol, each symbol carrying several phase and amplitude modulated carriers, some of which are shifted in frequency in a predetermined way from one symbol to the next one to form pilots; a bidimensional filter for interpolating, from anchors corresponding to the pilots such as received from several consecutive symbols, the distortion undergone by each carrier; and a circuit for correcting the shifting of the window with respect to an optimal position. The demodulator includes a circuit for correcting each distortion according to window shifting corrections performed respectively for the symbol associated with the distortion and for the symbols associated with the anchors used to interpolate the distortion.

公开(公告)号：FR2781626A1

公开(公告)日：2000-01-28

申请号：FR9809578

申请日：1998-07-23

Applicant: ST MICROELECTRONICS SA

Inventor： MEYER JACQUES

IPC: H04L27/00 ,  H04L27/227 ,  H04L27/22 ,  H04L1/20

Abstract: The process uses multiplication of vector angle and analysis of derivative to locate error. The procedure provides an estimation of the frequency error of a demodulator which is used to reconstruct two binary signals (I,Q) carried on two carriers of the same frequency but operating in phase quadrature. The procedure comprises the first stage of forming vectors having the successive pairs of values (I,Q) of two binary signals as components. The second stage includes applying to each vector a transformation which multiplies its angle by four, at least when it is equal to a multiple of /4, whilst retaining its modulus. The third stage includes calculating the average (x1,y1) of the transformed vectors. The frequency error is obtained as being equal to the angular derivative of the average vector.