Abstract:
A communication method and system for converging a 5th-Generation (5G) communication system for supporting higher data rates beyond a 4th-Generation (4G) system with a technology for Internet of Things (IoT) are provided. The disclosure may be applied to intelligent services based on the 5G communication technology and the IoT-related technology, such as smart home, smart building, smart city, smart car, connected car, health care, digital education, smart retail, security and safety services. According to the disclosure, an antenna module includes a first substrate layer on which at least one substrate is stacked; an antenna coupled to an upper end surface of the first substrate layer; a second substrate layer having an upper end surface coupled to a lower end surface of the first substrate layer and on which at least one substrate is stacked; and a radio frequency (RF) element coupled to a lower end surface of the second substrate layer.
Abstract:
Disclosed is an electronic device including at least one wireless communication circuit configured to provide a first radio access technology (RAT) and a second RAT, at least one processor operatively connected to the at least one wireless communication circuit and configured to provide a first packet data convergence protocol (PDCP) related to the first RAT and a second PDCP related to the second RAT, a volatile memory operatively connected to the at least one processor and including, in at least a partial region thereof, a first buffer, and a nonvolatile memory operatively connected to the at least one processor or coupled to the processor. The electronic device may change a PDCP version of a data packet based on a change of a PDCP version. Besides, other various embodiments recognized through the present disclosure can be made.
Abstract:
A method for controlling a temperature in an air conditioning device according to an embodiment of the present invention includes: calculating an exponentially-weighted running mean temperature for outdoor temperatures measured for a predetermined period, setting a variable constant and a fixed constant according to the exponentially-weighted running mean temperature and an operation condition, setting a comfort temperature by multiplying the exponentially-weighted running mean temperature by the variable constant and adding the fixed constant, and controlling an indoor temperature by using the set comfort temperature. Here, the fixed constant and the variable constant are constants obtained through a regression analysis of a distribution relationship between an exponentially-weighted running mean temperature and a comfort temperature, and the distribution of comfort temperatures is linearly increased from the fixed constant with a gradient of the comfort temperature according to the exponentially-weighted running mean temperature.
Abstract:
A semiconductor device includes a vertical pattern including a first source/drain region, a second source/drain region having a height higher than a height of the first source/drain region, and a vertical channel region between the first and second source/drain regions, a front gate structure facing a first side surface of the vertical pattern, and a back gate structure facing a second side surface of the vertical pattern, opposite to the first side surface of the vertical pattern. The front gate structure includes a gate electrode on the first side surface of the vertical pattern, and a gate dielectric layer including a portion disposed between the vertical pattern and the gate electrode. The back gate structure includes a back gate electrode on the second side surface of the vertical pattern, and a dielectric structure including a portion disposed between the vertical pattern and the back gate electrode. The dielectric structure includes an air gap.
Abstract:
A semiconductor device (1) includes a substrate (5), a first gate structure (30a) and a second gate structure (30b) on the substrate, a single back gate structure (40) between the first gate structure and the second gate structure, a first structure including a first vertical channel region (20c1) extending in a vertical direction (Z), at least a portion of the first vertical channel region between the first gate structure and the single back gate structure, and a second structure (20c2) including a second vertical channel region extending in the vertical direction. The second structure is spaced apart from the first structure, and at least a portion of the second vertical channel region is between the second gate structure and the single back gate structure.
Abstract:
A semiconductor memory device includes active regions including first impurity regions and second impurity regions, word lines on the active regions and extended in a first direction, bit lines on the word lines and extended in a second direction crossing the first direction, the bit lines being connected to the first impurity regions, first contact plugs between the bit lines, the first contact plugs being connected to the second impurity regions, landing pads on the first contact plugs, respectively, and gap-fill structures filling spaces between the landing pads, top surfaces of the gap-fill structures being higher than top surfaces of the landing pads.