Abstract:
An apparatus and method, using an inter-processor lock to control access to inter-process relationship data structures in the memory (3a, 3b, ..., 3n) of each processor (2a, 2b, ..., 2n) in a multiprocessor system (1). The apparatus and method insure that each inter-process relationship is modified in the same sequence on each processor (2a, 2b, ..., 2n). The apparatus and method also insure that an inter-process relationship is maintained in a consistent state in the face of failure of any of the processors (2a, 2b, ..., 2n).
Abstract:
A system and method may be utilized to identify concurrency levels of processing stages in a distributed system, identify common resources and bottlenecks in the distributed system using the identified concurrency levels, and allocate resources in the distributed system using the identified concurrency levels.
Abstract:
One or more embodiments may provide a method for performing a replay. The method includes initiating execution of a program, the program having a plurality of sets of instructions, and each set of instructions has a number of chunks of instructions. The method also includes intercepting, by a virtual machine unit executing on a processor, an instruction of a chunk of the number of chunks before execution. The method further includes determining, by a replay module executing on the processor, whether the chunk is an active chunk, and responsive to the chunk being the active chunk, executing the instruction.
Abstract:
An activity recording system for a concurrent software environment executing software threads in a computer system, the activity recording system comprising: a thread state indicator for recording an indication of a synchronisation state of a software thread in which the software thread ceases to execute in a processor of the computer system, the indication being associated with an identification of the software thread; a time profiler for identifying a processor of the computer system being idle and recording an indication that the processor is idle; a dispatch monitor for identifying the dispatch of the software thread to the processor and, responsive to the indication that the processor is idle and the indication of a synchronisation state of the software thread, generating a record attributing the idleness of the processor to the software thread and the indicated synchronisation state.
Abstract:
Various embodiments for facilitating search, list and retrieval operations on a persistent data set using a distributed shared memory (DSM) by a processor device are provided. In one exemplary embodiment, a DSM is used to store the data structures in a cluster shared memory, such that updates, deletions and insertions are applied to both the persistent data set and the DSM, and search, list and retrieval operations are processed directly from the DSM. A data structure in the persistent data set is stored in two separate DSM pages: a first page includes an identifying search key of the data structure, the search key also pointing to a location of the data structure in the storage. A second page includes the updatable properties of the data structure. A DSM storing the data structures' pages is organized as a two-row matrix.
Abstract:
To lock use of shared information to itself in a multiprocessor system (100) having two independently and asynchronously operating processors (101, 111) whose main store units (102, 112) duplicate each other's contents, a processor must cause an atomic read-modify-write (RMW) operation to be executed on a semaphore in the duplicated main store units of both processors. To properly order execution of multiple such RMW operations, arbiters (106, 116) of system buses (105, 115) of the two processors communicate over an interarbiter channel (121). The arbiter of a source processor that wishes to perform a RMW operation notifies the other processor's arbiter over the interarbiter channel. Simultaneous attempts at notification by both arbiters are resolved in favor of one of them that is designated the master. The notifying arbiter prevents its processor from performing another RMW operation until the one RMW operation has completed thereon, but permits other operations to proceed normally. The notified arbiter prevents its processor from performing another RMW operation until the one RMW operation has been transferred via interprocessor links (107, 117) and bus (120) from the source processor to the notified arbiter's processor and has been performed thereon, but permits other operations to proceed normally. Thus multiple RMW operations are performed on both processors in the same order asynchronously and without impacting performance of other operations.
Abstract:
Storage access requests are received from one or more applications. Multiple servers update multiple virtual disks as directed by the storage access requests. The virtual disks store data that is write order dependent across the virtual disks. Logs are associated with the virtual disks. Information associated with each storage access request is stored in one of the logs. A cycle of log switching is performed. A write order consistent tracking coordinator coordinates the log switching with agents at the servers to maintain request ordering. Replication coordinators coordinate the application of the switched-out log files from primary storage to replica storage, creating a write-order consistent point on the replica side matching the primary side, and providing for failure resiliency regarding transfer of the logs. The replication logs may be received individually on the replica side from the servers on the primary side to enable highly scalable parallel/simultaneous transfers of the logs.