Handling and processing system for wafer
    41.
    发明专利
    Handling and processing system for wafer 审中-公开
    WAFER的处理和处理系统

    公开(公告)号:JP2005167210A

    公开(公告)日:2005-06-23

    申请号:JP2004310386

    申请日:2004-10-26

    Abstract: PROBLEM TO BE SOLVED: To enable overall observation of a fault in wafer processing, pairing up with a data network, and to prevent smearing by enabling the utilization of correction/measurement of a relationship between information on actual data and the simulation of wafer processing, prior to the offsetting of the processing beyond control or definite limitation. SOLUTION: The correction/measurement for wafer can be utilized for the relationship between the actual data and the processing simulation, prior to the offsetting of the processing beyond definite limitation. A vertical wafer processor is provided, in which a wafer is allowed to be contacted only at its edges. When a wafer is handled in a vertical manner, air flows vertically across the wafer to partially decrease smearing by fine particles. By handling a wafer in a vertical manner, strain due to the gravity that would have been caused by handling the wafer in a horizontal manner is decreased. Limitation of contact to an edge portion alone of a wafer decreases potentially harmful influence, such as smearing or breakage, that would be caused by contact. Further, by handling a wafer through its edge portion alone, both of the entire surfaces of the wafer can be the coverage of measurement. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:为了能够全面观察晶片处理中的故障,与数据网络配对,并且通过实现对实际数据的信息和模拟之间的关系的校正/测量的利用来防止拖尾 在处理偏移超出控制或明确限制之前的晶片处理。

    解决方案:在处理偏移超出明确限制之前,可以将晶圆的校正/测量用于实际数据和处理模拟之间的关系。 提供了一种垂直晶片处理器,其中允许晶片仅在其边缘处被接触。 当以垂直方式处理晶片时,空气垂直流过晶片,以部分地减少细颗粒的拖尾。 通过以垂直方式处理晶片,减少了由于以水平方式处理晶片而引起的重力引起的应变。 与晶片单独的边缘部分接触的限制减少了由接触引起的潜在的有害影响,如拖尾或断裂。 此外,通过仅通过其边缘部分处理晶片,晶片的整个表面都可以是测量的覆盖范围。 版权所有(C)2005,JPO&NCIPI

    HANDLING AND TREATING SYSTEM OF WAFER
    42.
    发明专利

    公开(公告)号:JP2002151562A

    公开(公告)日:2002-05-24

    申请号:JP2001230899

    申请日:2001-07-31

    Applicant: ADE CORP

    Abstract: PROBLEM TO BE SOLVED: To prevent contamination and damage on a wafer in a measuring station and measuring stations. SOLUTION: Wafers 22a-n are stored in cassettes 24a-g in input and output transfer to and from the measuring station 12. The cassettes 24a-g have plural trenches having the form and dimension for maintaining the wafers 22a-n substantially in the vertical direction, and the bottoms are opened in order to facilitate vertical transfer of the wafers 22a-n. In the measuring station 12, the wafer 22f is treated while being maintained vertically. By the vertical type wafer treating equipment, contact is performed only with the edge of a wafer, so that air flows intersecting the wafer vertically and contamination caused by fine particles is reduced. Distortion of a wafer which is caused by the influence of gravity in the case of horizontal treatment is reduced by the vertical treatment. By limiting the contact with the edge, contamination and damage can be reduced. By handling the edge, the whole of both surfaces of a wafer is made an effective range of measurement.

    Environment immune high precision capacitive gauging system
    44.
    发明授权
    Environment immune high precision capacitive gauging system 失效
    环境免疫高精度电力测量系统

    公开(公告)号:US3805150A

    公开(公告)日:1974-04-16

    申请号:US29270072

    申请日:1972-09-27

    Applicant: ADE CORP

    Inventor: ABBE R

    CPC classification number: G01R27/02 G01B7/023

    Abstract: A capacitive probe having at least two electrically conducting probe tips or electrodes centrally placed within an electrically conducting housing and axially displaced from each other within the housing. A physical dimension is measured by determining the capacitance between one probe tip and a surface, the capacitance therebetween varying with the dimension being measures. Precise machining of planar probe tips and assemblies to make them identical, their close placement, and the use of a moisture impenetrable dielectric for supporting the tips within the housing insure precision measurement and environmental independence. This precision and its maintenance is augmented by electronic excitation circuitry for the probe tips which maintain the instantaneous electric potential on each tip approximately equal and which gives an output signal whose average variation from a ground or common potential is directly indicative of the distance being gauged. Modifications to the basic probe construction include: provisions for guarding each probe tip with a substantially equal potential: thin or thick film deposition probe tip constructions; and probes having a plurality of tips for sensing a multiplicity of factors influencing the capacitance between the probe and a surface with circuits for separating the factors. A specific application of this for dielectric strip width measurement is presented.

    Abstract translation: 电容式探针,其具有至少两个导电探针尖端或电极,它们集中放置在导电壳体内并在壳体内彼此轴向移位。 通过确定一个探针尖端和表面之间的电容来测量物理尺寸,其间的电容随着测量的尺寸而变化。 平面探针尖端和组件的精密加工使它们相同,它们的紧密放置,以及使用不透水性的绝缘电介质来支撑壳体内的尖端,确保精确的测量和环境独立性。 这种精度及其维护通过用于探针尖端的电子激励电路来增强,该电极激励电路保持每个尖端上的瞬时电势大致相等,并且给出输出信号,其平均距地面或公共电位的变化直接指示被测量的距离。 对基本探头结构的修改包括:用于保护具有基本相等电位的每个探针尖端的规定:薄或厚膜沉积探针尖端构造; 以及具有多个尖端的探针,用于感测影响探针和表面之间的电容的多个因素,用于分离因子的电路。 介绍了介质带宽测量的具体应用。

    Apparatus for indicating an object reversal of direction
    46.
    发明授权
    Apparatus for indicating an object reversal of direction 失效
    用于指示目标反向的装置

    公开(公告)号:US3815111A

    公开(公告)日:1974-06-04

    申请号:US27611572

    申请日:1972-07-28

    Applicant: ADE CORP

    Inventor: ABBE R

    CPC classification number: G01L23/30 G01P13/04

    Abstract: An apparatus containing a transducer and which provides an output signal when an object which is moving toward the transducer reverses direction to move away from the transducer. The transducer provides a signal which peaks in response to the direction reversal. In one embodiment of the invention, the transducer signal is initially differentiated. In another embodiment of the invention, the transducer signal is fed to a peak reader circuit adapted to provide a first output which rises until the peak of the transducer signal occurs and a second output that crosses zero when the transducer signal stops rising. In both of these embodiments, a zero-crossing detecting circuit is thereafter used to provide a signal in response to either the differentiated signal or the second signal from the reader circuit. The output of this zero-crossing detecting circuit thus indicates the object''s reversal of direction. Another embodiment of the invention indicates the difference between the object''s position at a particular time with respect to its position at which it previously changed direction. Other embodiments of the invention are adapted to indicate the time difference between the occurrence of an event and the occurrence of the object''s direction reversal. The above embodiments are particularly useful in determining the occurrence of top dead center of a piston in an internal combustion engine and for timing the occurrence of top dead center with respect to the piston''s spark. In still another embodiment of the invention, an indication of the rises and depressions in the surface of a base circle of a camshaft is provided. Preferably, the transducer utilized when determining top dead center is a capacitive probe having a spherical or hemispherical measuring electrode.

    Abstract translation: 一种包含换能器的装置,当朝向换能器移动的物体反向移动远离换能器的方向时,其提供输出信号。 传感器提供响应于方向反转而峰值的信号。 在本发明的一个实施例中,传感器信号最初是有区别的。 在本发明的另一个实施例中,传感器信号被馈送到峰值读出器电路,其适于提供第一输出,其升高直到换能器信号的峰值出现,以及当换能器信号停止上升时跨越零的第二输出。 在这两个实施例中,之后使用过零检测电路来响应来自读取器电路的微分信号或第二信号来提供信号。 因此,过零检测电路的输出表示物体的方向反转。 本发明的另一实施例指出了物体在特定时间相对于其先前改变方向的位置的位置之间的差异。 本发明的其他实施例适于指示事件的发生与对象的方向反转的发生之间的时间差。 上述实施例特别可用于确定内燃机中的活塞的上止点的发生和相对于活塞的火花的上止点的发生定时。 在本发明的另一个实施例中,提供凸轮轴的基圆的表面中的上升和下降的指示。 优选地,当确定上止点时使用的换能器是具有球形或半球形测量电极的电容式探针。

    Capacitive gauge
    47.
    发明授权
    Capacitive gauge 失效
    电容量规

    公开(公告)号:US3706919A

    公开(公告)日:1972-12-19

    申请号:US3706919D

    申请日:1970-08-17

    Applicant: ADE CORP

    Inventor: ABBE ROBERT C

    CPC classification number: G01B7/023 G01R27/02

    Abstract: A capacitive probe having at least two electrically conducting probe tips or electrodes centrally placed within an electrically conducting housing and axially displaced from each other within the housing. A physical dimension is measured by determining the capacitance between one probe tip and a surface, the capacitance therebetween varying with the dimension being measured. Precise machining of planar probe tips and assemblies to make them identical, their close placement, and the use of a moisture impenetrable dielectric for supporting the tips within the housing insure precision measurement and environmental independence. This precision and its maintenance is augmented by electronic excitation circuitry for the probe tips which maintain the instantaneous electric potential on each tip approximately equal and which gives an output signal whose average variation from a ground or common potential is directly indicative of the distance being gauged. Modifications to the basic probe construction include: provisions for guarding each probe tip with a substantially equal potential: thin or thick film deposition probe tip constructions; and probes having a plurality of tips for sensing a multiplicity of factors influencing the capacitance between the probe and a surface with circuits for separating the factors. A specific application of this for dielectric strip width measurement is presented.

    Abstract translation: 电容式探针,其具有至少两个导电探针尖端或电极,它们集中放置在导电壳体内并在壳体内彼此轴向移位。 通过确定一个探针尖端和表面之间的电容来测量物理尺寸,其间的电容随着被测量的尺寸而变化。 平面探针尖端和组件的精密加工使它们相同,它们的紧密放置,以及使用不透水性的绝缘电介质来支撑壳体内的尖端,确保精确的测量和环境独立性。 这种精度及其维护通过用于探针尖端的电子激励电路来增强,该电极激励电路保持每个尖端上的瞬时电势大致相等,并且给出输出信号,其平均距地面或公共电位的变化直接指示被测量的距离。 对基本探头结构的修改包括:用于保护具有基本相等电位的每个探针尖端的规定:薄或厚膜沉积探针尖端构造; 以及具有多个尖端的探针,用于感测影响探针和表面之间的电容的多个因素,用于分离因子的电路。 介绍了介质带宽测量的具体应用。

    Notched/flatted 200mm wafer edge grip end effector
    48.
    发明专利
    Notched/flatted 200mm wafer edge grip end effector 审中-公开
    注入/平铺200MM波形边缘GRIP END EFFECTOR

    公开(公告)号:JP2005167208A

    公开(公告)日:2005-06-23

    申请号:JP2004308469

    申请日:2004-10-22

    CPC classification number: H01L21/68707

    Abstract: PROBLEM TO BE SOLVED: To provide an improved equipment for dealing with a semiconductor wafer.
    SOLUTION: The equipment comprises an wafer edge grip end effector 100 having a paddle substrate 102 equipped with an end side end and a center side end. A first arc wafer contact pad 105 is arranged at the end side end on the substrate 102. Second and third arc contact pads 108 are arranged adjacently to the center side end on the substrate 102. The wafer contact pads 105 and 108 each comprise a first arc front surface for engagement with the edge of the wafer and a second sloping front surface. The end effector 100 further comprises a movable wafer grip finger 110 arranged between the second and third wafer contact pads on the substrate 102. The movable finger 110 has the first arc front surface for imposing, in contact with the wafer edge, the wafer edge on the first wafer contact pad. An wafer 120 on the substrate 102 is held by it.
    COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种用于处理半导体晶片的改进的设备。 解决方案:设备包括具有装配有端侧端和中心侧端的桨叶基板102的晶片边缘抓握端部执行器100。 第一弧形晶片接触焊盘105布置在基板102的端侧端。第二和第三弧形接触焊盘108相对于基板102上的中心侧端设置。晶片接触焊盘105和108各自包括第一 弧形前表面用于与晶片的边缘接合并具有第二倾斜前表面。 末端执行器100还包括布置在基板102上的第二和第三晶片接触焊盘之间的可移动的晶片抓握​​指状物110.可动指状物110具有第一弧形前表面,用于施加与晶片边缘接触的晶片边缘 第一个晶圆接触垫。 衬底102上的晶片120由其保持。 版权所有(C)2005,JPO&NCIPI

    Wafer gripping fingers to minimize distortion
    49.
    发明专利
    Wafer gripping fingers to minimize distortion 有权
    拖曳手指以最小化失败

    公开(公告)号:JP2005051213A

    公开(公告)日:2005-02-24

    申请号:JP2004187383

    申请日:2004-06-25

    Abstract: PROBLEM TO BE SOLVED: To provide gripping fingers of a semiconductor wafer to minimize the distortion of the wafer. SOLUTION: The apparatus includes a plurality of wafer gripping fingers 102 for holding a wafer 104 in a predetermined position. Each finger 102 includes a groove 101 that contacts the edge of the wafer 104. The groove and the wafer edge have respective radii re, rf of curvature, in which the radius rf of the curvature of the groove 101 is greater than the radius re of the wafer edge. Each finger 102 includes a rigid member having a recess formed in a central location at one end thereof, and a compliant material such as PEEK disposed in the recess in which the groove 101 is formed. The compliant material extends a first distance beyond the rigid member at the central location of the groove 101 and a second shorter distance beyond the rigid member on each side of the central location. Because the groove areas on each side of the central area are more rigid than the central groove area, the fingers 102 can hold the wafer 104 with a high precision while reducing the distortion of the wafer 104. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题:提供半导体晶片的夹持指令以最小化晶片的变形。 解决方案:该装置包括用于将晶片104保持在预定位置的多个晶片夹持爪102。 每个指状物102包括接触晶片104的边缘的凹槽101.凹槽和晶片边缘具有相应的曲率半径rf,其中凹槽101的曲率的半径rf大于凹槽101的半径re 晶圆边缘。 每个指状物102包括刚性构件,其具有形成在其一端的中心位置处的凹部,以及布置在其中形成有凹槽101的凹部中的柔性材料,例如PEEK。 顺应性材料在凹槽101的中心位置处延伸超过刚性构件的第一距离,并且在中心位置的每一侧上延伸超过刚性构件的第二较短距离。 因为中央区域的每侧的凹槽区域比中心凹槽区域更刚性,所以指状物102可以以高精度保持晶片104,同时减少晶片104的变形。版权所有(C)2005 ,JPO&NCIPI

    EDGE DETECTOR, CAPACITIVE DISTANCE MEASURING DEVICE, AND WAFER CARRIER DEVICE

    公开(公告)号:JPH0327545A

    公开(公告)日:1991-02-05

    申请号:JP4084290

    申请日:1990-02-21

    Applicant: ADE CORP

    Abstract: PURPOSE: To miniaturize a probe for measurement of semiconductor wafers by facing capacitive probes having parameters near at a wafer and placing an electric circuit having a plurality of operational amplifiers at a separated position. CONSTITUTION: A first probe 24 detects the distance d from a semiconductor wafer 11 and position of edge 11 from a capacitance detected by an edge detecting electrode 28 and second probe 26 detects only the distance d between the wafer 12 and space detecting electrode 30 caused by bow/warp of the wafer 12. The capacitance detected by the electrode 28 of the probe 24 and electrode 30 of the probe 26 is inputted to an input circuit of an electronic apparatus having first and second operational amplifiers located at a separated place and analyzed there. This provides more small-size stabilized probes 24, 26 for measuring the wafer 12.

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