公开(公告)号：EP3011594A4

公开(公告)日：2017-03-01

申请号：EP14814462

申请日：2014-06-20

Applicant: STRATIO INC

Inventor： LEE JAE HYUNG ,  NA YEUL ,  KIM YOUNGSIK ,  JUNG WOO-SHIK

IPC: H01L27/146

CPC classification number: H01L27/14649 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14689 ,  H04N5/361

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

公开(公告)号：EP3701217A1

公开(公告)日：2020-09-02

申请号：EP18870058.7

申请日：2018-10-29

Applicant: Stratio

Inventor： LEE, Jae Hyung ,  KIM, Youngsik ,  NA, Yeul ,  KANG, Juhyung

IPC: G01B9/00 ,  G01J1/00 ,  G01J1/10 ,  G01J1/16 ,  G01J1/42

公开(公告)号：EP3011594B1

公开(公告)日：2018-12-26

申请号：EP14814462.9

申请日：2014-06-20

Applicant: Stratio, Inc.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L27/146

CPC classification number: H01L31/1136 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/1804 ,  H04N5/361 ,  H04N5/378

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

公开(公告)号：EP3011594A2

公开(公告)日：2016-04-27

申请号：EP14814462.9

申请日：2014-06-20

Applicant: Stratio, Inc.

Inventor： LEE, Jae, Hyung ,  NA, Yeul ,  KIM, Youngsik ,  JUNG, Woo-Shik

IPC: H01L27/14 ,  H01L27/142 ,  H01L27/146

CPC classification number: H01L31/1136 ,  H01L27/14614 ,  H01L27/14616 ,  H01L27/14649 ,  H01L27/14689 ,  H01L31/1804 ,  H04N5/361 ,  H04N5/378

Abstract: A device for sensing light includes a first semiconductor region doped with a dopant of a first type and a second semiconductor region doped with a dopant of a second type. The second semiconductor region is positioned above the first semiconductor region. The device includes a gate insulation layer; a gate, a source, and a drain. The second semiconductor region has a top surface that is positioned toward the gate insulation layer and a bottom surface that is positioned opposite to the top surface of the second semiconductor region. The second semiconductor region has an upper portion that includes the top surface of the second semiconductor region and a lower portion that includes the bottom surface of the second semiconductor region and is mutually exclusive with the upper portion. The first semiconductor region is in contact with both the upper portion and the lower portion of the second semiconductor region.

Abstract translation: 用于感测光的装置包括掺杂有第一类型的掺杂剂的第一半导体区域和掺杂有第二类型的掺杂剂的第二半导体区域。 第二半导体区域位于第一半导体区域的上方。 该器件包括栅极绝缘层; 一个门，一个源头和一个排水沟。 第二半导体区域具有朝向栅极绝缘层定位的顶表面和与第二半导体区域的顶表面相对定位的底表面。 第二半导体区域具有包括第二半导体区域的顶表面的上部和包括第二半导体区域的底表面并且与上部相互排斥的下部。 第一半导体区域与第二半导体区域的上部和下部两者接触。