公开(公告)号：WO1996021968A1

公开(公告)日：1996-07-18

申请号：PCT/US1995012415

申请日：1995-09-29

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  PETERSON, Kevin, H. ,  MASSALIN, Henry

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: H03D03/00

CPC classification number: H03D3/007 ,  H03D2200/005 ,  H03D2200/0052 ,  H03D2200/0062 ,  H03D2200/0072

Abstract: A digital FM demodulator and method for determining phase changes in highly oversampled complex FM digital signals is described. In a first embodiment the FM signal is oversampled with respect to the frequency of its associated modulating signal. In this embodiment a first digital processing stage delays and conjugates the original FM signal. This delayed conjugated original FM signal is then multiplied with the original FM signal to generate a second signal that represents the changes in the phase between samples of the original FM signal. A second processing stage then delays and conjugates the second signal. The delayed conjugated second signal is then multiplied with the original second signal to generate a third signal that represents changes in the phase between samples of the second signal. The imaginary component of the third signal is passed through a digital integrator which outputs the phase changes of the original FM signal. In a second embodiment, the highly oversampled signal is oversampled with respect to the deviation frequency of its associated modulating signal. In this embodiment the center frequency of the original FM signal is frequency shifted to approximately zero frequency. This frequency shifted signal is then delayed and conjugated. The delayed conjugated shifted signal is then multiplied with the original frequency shifted signal; yielding an output signal where the imaginary portion of the output signal is equal to the phase changes of the original FM signal.

Abstract translation: 描述了用于确定高度过采样的复数FM数字信号中的相位变化的数字FM解调器和方法。 在第一实施例中，FM信号相对于其相关调制信号的频率被过采样。 在该实施例中，第一数字处理级延迟并共轭原始FM信号。 然后将该延迟的共轭原始FM信号与原始FM信号相乘以产生表示原始FM信号的样本之间的相位变化的第二信号。 第二处理级然后延迟并共轭第二信号。 然后将延迟的共轭第二信号与原始第二信号相乘以产生表示第二信号的样本之间的相位变化的第三信号。 第三信号的虚分量通过数字积分器，该数字积分器输出原始FM信号的相位变化。 在第二实施例中，高度过采样的信号相对于其相关调制信号的偏差频率被过采样。 在这个实施例中，原始FM信号的中心频率被频移到大致零频率。 然后，该频移信号被延迟并共轭。 然后将延迟的共轭移位信号与原始频移信号相乘; 产生输出信号，其中输出信号的虚部等于原始FM信号的相位变化。

公开(公告)号：WO1996003807A1

公开(公告)日：1996-02-08

申请号：PCT/US1995009349

申请日：1995-07-25

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC. ,  MOSTYN, Graham, Y. ,  HERNDON, William, H. ,  MOUSSOURIS, John, P. ,  ROBINSON, Timothy, B. ,  ROSSEEL, Geert, P.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC.

IPC: H03K19/0185

CPC classification number: H03K19/0013 ,  H03K19/018507

Abstract: The present invention is an improvement of a digital topology including a logic block portion and a buffer portion. The improved buffer portion of the present invention is implemented with first and second parallel, same conductivity type transmission gates. The transmission gates couple either a first (V1) or second (V2) voltage onto the output of the buffer (55) in response to a logic signal originating from the logic block portion. The first (V1) and second (V2) voltages are selected to be relatively close in magnitude such that the peak-to-peak voltage of the digital output signal seen on the output of the buffer is relatively small. As a result, power consumption for charging the output of the buffer is minimized. In addition, the parallel transmission gates only consume power while charging the output of the buffer so that quiescent power consumption of the buffer is eliminated. Quiescent power dissipation is also eliminated in certain types of logic block designs that include logic gates having constant current sources. This is achieved by enabling the current sources with a pulse signal. The pulse width and magnitude of the pulse signal is selected to allow a latched sense amplifier to sense valid data from the output of the logic block portion during a specified interval. After valid data is sensed, the logic blocks's current sources are disabled, and the logic block portion no longer consumes any power. The sense amplifier is enabled for intervals long enough to capture the data from the logic block and drive the transmission gates with the data. In this configuration, none of the elements in the topology dissipate quiescent power since none of them are constantly operating.

Abstract translation: 本发明是包括逻辑块部分和缓冲部分的数字拓扑的改进。 本发明的改进的缓冲部分由第一和第二平行的相同导电类型的传输门来实现。 响应于源自逻辑块部分的逻辑信号，传输门将第一（V1）或第二（V2）电压耦合到缓冲器（55）的输出上。 第一（V1）和第二（V2）电压被选择为相对接近于幅度，使得在缓冲器的输出端上看到的数字输出信号的峰 - 峰电压相对较小。 结果，对缓冲器的输出进行充电的功耗最小化。 此外，并行传输门仅在缓冲器的输出充电时消耗功率，从而消除了缓冲器的静态功耗。 在包括具有恒定电流源的逻辑门的某些类型的逻辑块设计中也消除了静态功耗。 这是通过使能脉冲信号的电流源实现的。 选择脉冲信号的脉冲宽度和幅度以允许锁存的读出放大器在指定的间隔期间从逻辑块部分的输出检测有效数据。 在检测到有效数据之后，逻辑块的当前源被禁用，并且逻辑块部分不再消耗任何电力。 读出放大器使能间隔足够长的时间来捕获来自逻辑块的数据，并用数据驱动传输门。 在这种配置中，拓扑中的任何元件都不会消耗静态功耗，因为它们都不会持续运行。

公开(公告)号：WO1993014445A1

公开(公告)日：1993-07-22

申请号：PCT/US1993000456

申请日：1993-01-15

Applicant: MICROUNITY SYSTEMS ENGINEERING, INC.

Inventor： MICROUNITY SYSTEMS ENGINEERING, INC. ,  CHEN, Jang, Fung ,  MATTHEWS, James, A.

IPC: G03F09/00

CPC classification number: G03F1/36 ,  G03F7/70433 ,  G03F7/70441

Abstract: An improvement for reducing proximity effects comprised of additional lines, referred to as intensity leveling bars, into the mask pattern. The leveling bars perform the function of adjusting the edge intensity gradients of isolated edges in the mask pattern, to match the edge intensity gradients of densely packed edges. Leveling bars are placed parallel to isolated edges such that intensity gradient leveling occurs on all isolated edges of the mask pattern. In addition, the leveling bars are designed to have a width significantly less than the resolution of the exposure tool. Therefore, leveling bars that are present in the mask pattern produce resist patterns that completely developed away when a nominal exposure energy is utilized during exposure of photoresist.

公开(公告)号：WO1991004104A1

公开(公告)日：1991-04-04

申请号：PCT/US1990005146

申请日：1990-09-12

Applicant: CREATIVE SYSTEMS ENGINEERING, INC.

Inventor： CREATIVE SYSTEMS ENGINEERING, INC. ,  BEATTY, Charles, L.

IPC: B05D03/06

CPC classification number: A62D3/19 ,  A62D2101/20 ,  A62D2101/22 ,  A62D2101/24 ,  A62D2203/10 ,  B01J19/126 ,  B01J2219/0894 ,  C10B53/00 ,  C23C16/00

Abstract: Closed system and process for the conversion of gaseous or a vaporizable organic and/or organo-metallic compound to inert solid which is resistant to solvent extraction, and is itself essentially nontoxic or convertible through oxidation or other natural processes to a toxic material. This process involves a low temperature, low energy conversion, in a close system, of an organic and/or organo-metallic material by initially fragmenting such material into its basic elements followed thereafter by randomly recombining such elements as a solid coating or deposit upon a substrate. In the preferred embodiments of this invention, the toxic and/or potentially toxic material is injected as a gaseous phase into a chamber (21) where it is subjected to an RF energy source (35), thereby forming a plasma which is contained within the chamber by a magnetic field produced by magnets (39) and (41). The chamber (21), as well as, the other components of the conversion system (25, 23) are maintained under a negative pressure through use of vacuum pump (45). This allows for the transport of the plasma throughout the system to a second chamber (23) where the elements of the plasma can recombine in a random fashion. The recombination of these elements as a solid allows for ease of handling and prevents their release into the atmosphere or ground water. Compounds which can be subjected to this process include chlorinatehydrocarbons i.e., methylenechloride, carbontetrachloride and chlorofluocarbons (i.e. Freons).

公开(公告)号：US10352824B2

公开(公告)日：2019-07-16

申请号：US14538996

申请日：2014-11-12

Applicant: Aero Systems Engineering, Inc.

Inventor： Dean Frederick Long ,  Kenneth William Simon ,  Grant August Radinzel

IPC: G01M15/14

Abstract: Systems and methods for determining turbine engine system stability encompass measuring or otherwise determining values of performance parameters, storing a data set of such values in memory, generating a stability indicator, and displaying the stability indicator on an operator interface. The stability indicator is generated by a processor operating in data communication with the computer memory, utilizing customized software algorithms to remove high frequency components, apply an adaptive filter to adjust selected parameters according to a target value of a selected target parameter, and apply a stochastic filters to estimate true values of the selected parameters, based on the remaining variation.

公开(公告)号：US10204055B2

公开(公告)日：2019-02-12

申请号：US15698180

申请日：2017-09-07

Applicant: MicroUnity Systems Engineering, Inc.

Inventor： Craig Hansen ,  John Moussouris ,  Alexia Massalin

IPC: G06F12/08 ,  G06F9/30 ,  G06F12/0875 ,  G06F9/34 ,  G06F9/38

Abstract: Expandably wide operations are disclosed in which operands wider than the data path between a processor and memory are used in executing instructions. The expandably wide operands reduce the influence of the characteristics of the associated processor in the design of functional units performing calculations, including the width of the register file, the processor clock rate, the exception subsystem of the processor, and the sequence of operations in loading and use of the operand in a wide cache memory.

公开(公告)号：US20160321071A1

公开(公告)日：2016-11-03

申请号：US15147811

申请日：2016-05-05

Applicant: MicroUnity Systems Engineering, Inc.

Inventor： Craig Hansen ,  John Moussouris ,  Alexia Massalin

IPC: G06F9/30

CPC classification number: G06F9/3001 ,  G03F1/36 ,  G06F9/30 ,  G06F9/30007 ,  G06F9/30014 ,  G06F9/30018 ,  G06F9/30029 ,  G06F9/30032 ,  G06F9/30036 ,  G06F9/3004 ,  G06F9/30043 ,  G06F9/30054 ,  G06F9/30098 ,  G06F9/30101 ,  G06F9/30109 ,  G06F9/30112 ,  G06F9/30145 ,  G06F9/30149 ,  G06F9/3016 ,  G06F9/30167 ,  G06F9/35 ,  G06F9/383 ,  G06F9/3851 ,  G06F9/3861 ,  G06F9/3885 ,  G06F9/4484 ,  G06F9/45533 ,  G06F12/02 ,  G06F17/5068 ,  G06F17/5072 ,  G06F17/5081 ,  G06F2217/12 ,  H03M13/158 ,  H03M13/4169 ,  Y02D10/13 ,  Y02D10/26 ,  Y02D10/28 ,  Y02P90/265

Abstract: A programmable processor and method for improving the performance of processors by expanding at least two source operands, or a source and a result operand, to a width greater than the width of either the general purpose register or the data path width. The present invention provides operands which are substantially larger than the data path with of the processor by using the contents of a general purpose register to specify a memory address at which a plurality of data path widths of data can be read or written, as well as the size and shape of the operand. In addition, several instructions and apparatus for implementing these instructions are described which obtain performance advantages if the operands are not limited to the width and accessible number of general purpose registers.

Abstract translation: 一种可编程处理器和方法，用于通过将至少两个源操作数或源和结果操作数扩展到大于通用寄存器或数据路径宽度的宽度的宽度来提高处理器的性能。 本发明提供了通过使用通用寄存器的内容来实质上大于处理器的数据路径的操作数，以指定可读取或写入数据的多个数据路径宽度的存储器地址，以及 操作数的大小和形状。 此外，描述了用于实现这些指令的几个指令和装置，其如果操作数不限于通用寄存器的宽度和可访问数量，则获得性能优点。

公开(公告)号：US20160157018A1

公开(公告)日：2016-06-02

申请号：US15017751

申请日：2016-02-08

Applicant: ADAMSON SYSTEMS ENGINEERING INC.

Inventor： Alan Brock ADAMSON ,  Ben CABOT

IPC: H04R3/12 ,  H04R29/00 ,  H02J9/06 ,  H04R27/00

CPC classification number: H04R3/12 ,  H02J7/00 ,  H02J9/06 ,  H04R3/00 ,  H04R27/00 ,  H04R29/007 ,  H04R2201/028 ,  H04R2227/003

Abstract: A control and distribution system provides electrical power distribution, audio signal distribution, and control signal distribution to one or more audio components, such as a powered loudspeaker element or a signal conditioning device such as a rack-mounted amplifier. Embodiments allow for the monitoring and/or control of parameters and/or components at or near the endpoint of the system. These parameters or components include low-level parameters associated with the external audio devices, as opposed to merely higher level parameters of the system. The control and distribution system may include an uninterrupted power source for providing power in an online or offline mode to selected components of the external audio devices. In some embodiments, online backup power is provided to low-power components without providing power to amplifiers within the external audio devices.

公开(公告)号：US20150378734A1

公开(公告)日：2015-12-31

申请号：US14749955

申请日：2015-06-25

Applicant: MicroUnity Systems Engineering, Inc.

Inventor： Craig Hansen ,  John Moussouris ,  Alexia Massalin

IPC: G06F9/30 ,  G06F12/08

CPC classification number: G06F12/0875 ,  G06F9/3016 ,  G06F9/30181 ,  G06F9/30192 ,  G06F9/34 ,  G06F9/3824 ,  G06F9/3895 ,  G06F2212/452

Abstract: Expandably wide operations are disclosed in which operands wider than the data path between a processor and memory are used in executing instructions. The expandably wide operands reduce the influence of the characteristics of the associated processor in the design of functional units performing calculations, including the width of the register file, the processor clock rate, the exception subsystem of the processor, and the sequence of operations in loading and use of the operand in a wide cache memory.

Abstract translation: 公开了可扩展地广泛的操作，其中在执行指令中使用比处理器和存储器之间的数据路径更宽的操作数。 可扩展的宽操作数减少了执行计算的功能单元的设计中相关处理器的特性的影响，包括寄存器文件的宽度，处理器时钟速率，处理器的异常子系统以及加载中的操作顺序 并在宽缓存中使用操作数。

公开(公告)号：US20130248282A1

公开(公告)日：2013-09-26

申请号：US13847762

申请日：2013-03-20

Applicant: AERO SYSTEMS ENGINEERING, INC.

Inventor： Chunyuen R. Cheng ,  Thomas H. Nathan

IPC: F01N1/08

CPC classification number: F01N1/084 ,  G10K11/161

Abstract: A matrix or array of elongated tubular members, each member being formed by spirally winding a piece or pieces of material into a generally cylindrical shape, wherein the matrix or array is mounted in an airflow to reduce the noise associated with and/or produced by the airflow.

Abstract translation: 每个构件通过将一片或多片材料螺旋地卷绕成大致圆柱形的形状而形成的矩形或阵列的细长管状构件，其中矩阵或阵列安装在气流中以减少与由...组成的和/或由 气流。