公开(公告)号：WO2012164272A2

公开(公告)日：2012-12-06

申请号：PCT/GB2012/051193

申请日：2012-05-25

Applicant: WOLFSON MICROELECTRONICS PLC ,  MACKAY, Graeme ,  WIGNER, Jonathan ,  MCLEOD, Gordon

Inventor： MACKAY, Graeme ,  WIGNER, Jonathan ,  MCLEOD, Gordon

IPC: H04M1/60

CPC classification number: H04M1/6025 ,  H04H60/04 ,  H04M1/72558

Abstract: An integrated circuit is used for digital signal routing. The integrated circuit has analog and digital inputs and outputs, including digital interfaces for connection to other integrated circuits. Inputs, including the digital interfaces, act as data sources. Outputs, including the digital interfaces, act as data destinations. The integrated circuit also includes signal processing blocks, which can act as data sources and data destinations. Signal routing is achieved by means of a multiply-accumulate block, which takes data from one or more data source and, after any required scaling, generates output data for a data destination. Data from a data source is buffered for an entire period of a data sample clock so that the multiply-accumulate block can retrieve the data at any point in the period, and output data of the multiply-accumulate block is buffered for an entire period of the data sample clock so that the data destination can retrieve the data at any point in the period. Multiple signal paths can be defined by configuration data supplied to the device, either by a user, or by software. The multiply-accumulate block operates on a time division multiplexed basis, so that multiple signal paths can be processed within one period of the sample clock. Each signal path has a respective sample clock rate, and paths with different sample clock rates can be routed through the multiply-accumulate block on a time division multiplexed basis independently of each other. Thus, speech signals at 8kHz or 16kHz can be processed concurrently with audio data at 44.1kHz or 48kHz.

Abstract translation: 集成电路用于数字信号路由。 集成电路具有模拟和数字输入和输出，包括用于连接到其他集成电路的数字接口。 输入，包括数字接口，作为数据源。 输出，包括数字接口，充当数据目的地。 该集成电路还包括可用作数据源和数据目的地的信号处理块。 信号路由通过乘法累加块实现，该乘法块从一个或多个数据源获取数据，并且在任何所需的缩放之后生成数据目的地的输出数据。 来自数据源的数据在数据采样时钟的整个周期中被缓冲，使得乘法累加块可以在该周期中的任何点检索数据，并且乘法累加块的输出数据被缓冲在整个周期 数据采样时钟，使得数据目的地可以在该周期的任何时间点检索数据。 多个信号路径可以由用户或软件提供给设备的配置数据来定义。 乘法累加块以时分复用为基础进行操作，从而可以在采样时钟的一个周期内处理多个信号路径。 每个信号路径具有各自的采样时钟速率，并且具有不同采样时钟速率的路径可以彼此独立地以时分复用为基础通过乘法累加块路由。 因此，可以以44.1kHz或48kHz的音频数据同时处理8kHz或16kHz的语音信号。

公开(公告)号：WO2012080742A2

公开(公告)日：2012-06-21

申请号：PCT/GB2011/052492

申请日：2011-12-16

Applicant: WOLFSON MICROELECTRONICS PLC ,  LESSO, John Paul

Inventor： LESSO, John Paul

IPC: H03F1/30

CPC classification number: H03F3/181 ,  H03F1/304 ,  H03F3/183 ,  H03F2200/03 ,  H03K3/013

Abstract: This application describes apparatus and method for DC offset compensation. An amplifier (102) receives an input signal (A IN ) and provides an amplified output signal (S OUT ) and a feedback path provides DC offset compensation. The feedback path comprises at least one voltage controlled oscillator (VCO) (108) and a counter (109). The VCO provides, over time, a first VCO output signal based on said amplified output signal and a second VCO output signal based on a reference signal (V REF ). The counter generates first pulse counts based upon the first VCO output signal and second pulse counts based upon the second VCO output signal and provides a compensation signal based on a comparison of the first and second pulse counts. One voltage controlled oscillator (108) may sequentially receive a signal based on said amplifier output signal and the reference signal from a multiplexer (110) so as to sequentially produce the first and second VCO output signals.

Abstract translation: 本申请描述了用于DC偏移补偿的装置和方法。 放大器（102）接收输入信号（A IN），并提供放大的输出信号（S OUT），并且反馈路径提供DC偏移补偿。 反馈路径包括至少一个压控振荡器（VCO）（108）和计数器（109）。 VCO随时间提供基于所述放大的输出信号的第一VCO输出信号和基于参考信号（V REF）的第二VCO输出信号。 计数器基于第一VCO输出信号产生第一脉冲计数，并基于第二VCO输出信号产生第二脉冲计数，并基于第一和第二脉冲计数的比较提供补偿信号。 一个压控振荡器（108）可以基于所述放大器输出信号和来自多路复用器（110）的参考信号顺序地接收信号，以便顺序地产生第一和第二VCO输出信号。

公开(公告)号：WO2012076866A1

公开(公告)日：2012-06-14

申请号：PCT/GB2011/052391

申请日：2011-12-02

Applicant: WOLFSON MICROELECTRONICS PLC ,  LOCKE, Antony

Inventor： LOCKE, Antony

IPC: G06F3/048 ,  H04L12/28

CPC classification number: G06F3/04847 ,  G06F3/04817 ,  G06F3/0488 ,  G08C2201/50 ,  H04L12/2814 ,  H04L12/282

Abstract: A control unit, comprises a display and a user input device, wherein the control unit is adapted to present on the display an icon representing a state of a controlled device, and to receive via the user input device inputs defining at least two of the position, size and orientation of the icon. The state of the controlled device is then controlled based on the user inputs. The control unit can form part of the controlled device, or the control unit and the controlled device can be in a single device. Alternatively, the control unit may have an interface for a wired or wireless connection to the controlled device. The controlled device can for example be an audio device such as a portable music player, a portable computing device, a communications device such as a mobile phone or a walkie talkie, a portable imaging device, a games console, or a home automation device.

Abstract translation: 控制单元包括显示器和用户输入设备，其中所述控制单元适于在所述显示器上呈现表示受控设备的状态的图标，并且经由所述用户输入设备接收定义所述位置中的至少两个的输入 ，尺寸和方向的图标。 然后基于用户输入来控制受控设备的状态。 控制单元可以形成受控设备的一部分，或者控制单元和受控设备可以在单个设备中。 或者，控制单元可以具有用于与受控设备的有线或无线连接的接口。 受控设备可以例如是诸如便携式音乐播放器，便携式计算设备，诸如移动电话或对讲机的通信设备，便携式成像设备，游戏控制台或家庭自动化设备的音频设备。

公开(公告)号：WO2011010145A3

公开(公告)日：2012-03-29

申请号：PCT/GB2010051192

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  MORE GRANT M ,  HAIPLIK HOLGER

Inventor： MORE GRANT M ,  HAIPLIK HOLGER

IPC: G06F1/32

CPC classification number: G06F1/3203 ,  Y10T307/469

Abstract: This invention relates to power management integrated circuits (PMICs) and related methods. In one aspect a PMIC which is operable to provide a plurality of PMIC power states is arranged to provide a predetermined delay before a power state transition. The delay is applied after receipt by the PMIC control circuitry of a power state transition command. Applying a delay allows time for the system powered by the PMIC to perform any necessary shut-down procedures and terminate active processes before power is removed, preventing corruption of the system. The delay is preferably configurable. The PMIC may also be arranged to control power converters which are external to the PMIC. In another aspect the PMIC has translation circuitry for providing the control settings of one power block, e.g. power converter, with any necessary modifications to be used by another power block. This means that only one set of control settings needs to be updated to change the output of both power blocks simultaneously.

Abstract translation: 本发明涉及功率管理集成电路（PMIC）及相关方法。 在一个方面，可操作以提供多个PMIC功率状态的PMIC被布置成在功率状态转换之前提供预定的延迟。 该延迟在PMIC控制电路接收到功率状态转换命令之后被应用。 应用延迟允许由PMIC供电的系统的时间执行任何必要的关闭过程，并在断电之前终止活动进程，防止系统损坏。 延迟优选是可配置的。 PMIC还可以被布置成控制PMIC外部的功率转换器。 在另一方面，PMIC具有翻译电路，用于提供一个功率块的控制设置，例如， 功率转换器，具有任何必要的修改以供另一个功率块使用。 这意味着只需要更新一组控制设置即可同时更改两个电源块的输出。

公开(公告)号：WO2011010144A3

公开(公告)日：2011-05-05

申请号：PCT/GB2010051191

申请日：2010-07-20

Applicant: WOLFSON MICROELECTRONICS PLC ,  NOTMAN ANDREW ,  MCCLOY-STEVENS MARK

Inventor： NOTMAN ANDREW ,  MCCLOY-STEVENS MARK

IPC: H02M3/158 ,  H02M1/00 ,  H02M1/38

CPC classification number: H02M3/1588 ,  H02M1/38 ,  H02M2001/0009 ,  H02M2001/0032 ,  Y02B70/1466

Abstract: This invention relates to methods and apparatus for control of DC-DC converters. The DC-DC converter (100) is operable so that the low side supply switch (20) may be inhibited from turning on in a cycle following the high side supply switch (10) turning off. Turn on of the low side switch is inhibited if the time between turn off of the high side switch (10) and the inductor (L) current reaching zero is less than a predetermined duration. Inhibiting the low side switch from turning on can prevent the inductor current from going negative, which would reduce the efficiency of the converter. When turn on of the low side switch is inhibited the inductor current flows through a parallel path, such as a parasitic body diode associated with the low side switch, which allows current flow in one direction only.

Abstract translation: 本发明涉及用于控制DC-DC转换器的方法和装置。 DC-DC转换器（100）可操作，使得可以在高侧供应开关（10）关闭之后的一个周期内禁止低侧供电开关（20）导通。 如果高侧开关（10）的关闭与电感（L）电流达到零之间的时间小于预定的持续时间，则低侧开关的导通被禁止。 抑制低端开关导通可以防止电感电流变负，从而降低转换器的效率。 当低侧开关的导通被禁止时，电感器电流流过并联路径，例如与低侧开关相关联的寄生体二极管，其允许电流仅在一个方向上流动。

公开(公告)号：WO2009156756A3

公开(公告)日：2011-01-06

申请号：PCT/GB2009050720

申请日：2009-06-24

Applicant: WOLFSON MICROELECTRONICS PLC ,  MAGRATH ANTHONY JAMES ,  GRAHAM CLIVE ROBERT

Inventor： MAGRATH ANTHONY JAMES ,  GRAHAM CLIVE ROBERT

IPC: G10K11/178 ,  G10L21/02 ,  G10L21/0208 ,  G10L21/0216

CPC classification number: G10K11/178 ,  G10K2210/1053 ,  G10K2210/1081 ,  G10K2210/3027 ,  G10L21/0208 ,  G10L2021/02082 ,  G10L2021/02165 ,  H03H21/0012

Abstract: A noise cancellation system for an audio system such as a mobile phone handset, or a wireless phone headset has a first input for receiving a first audio signal from one or more microphone positioned to receive ambient noise, and a second input for receiving a second audio signal from a microphone positioned to detect the user?s speech, as well as a third input for receiving a third audio signal for example representing the speech of a person to whom the user is talking. A first noise cancellation block receives the first audio signal and generates a first noise cancellation signal, and this is combined with the third audio signal to form a first audio output signal. A second noise cancellation block receives at least a part of the first audio signal and said second audio signal and applying noise cancellation to generate a second audio output signal.

Abstract translation: 用于诸如移动电话听筒或无线电话耳机的音频系统的噪声消除系统具有用于从被定位成接收环境噪声的一个或多个麦克风接收第一音频信号的第一输入端和用于接收第二音频的第二输入端 来自定位成检测用户语音的麦克风的信号，以及用于接收第三音频信号的第三输入，例如表示用户正在说话的人的语音。 第一噪声消除块接收第一音频信号并产生第一噪声消除信号，并将其与第三音频信号组合以形成第一音频输出信号。 第二噪声消除块接收第一音频信号和所述第二音频信号的至少一部分并且施加噪声消除以产生第二音频输出信号。

公开(公告)号：WO2010092399A2

公开(公告)日：2010-08-19

申请号：PCT/GB2010/050233

申请日：2010-02-12

Applicant: Wolfson Microelectronics plc ,  TRAYNOR, Anthony ,  RANKIN, Neil Sinclair ,  JENKINS, Colin Roberts ,  HOEKSTRA, Tsjerk ,  LAMING, Richard

Inventor： TRAYNOR, Anthony ,  RANKIN, Neil Sinclair ,  JENKINS, Colin Roberts ,  HOEKSTRA, Tsjerk ,  LAMING, Richard

CPC classification number: B81C1/00246 ,  B81B2201/0257 ,  H04R1/04 ,  H04R19/005 ,  H04R31/006

Abstract: The invention relates to the integration of MEMS transducers with electronic circuitry on the same substrate. A method of fabricating and integrated MEMS transducer and circuitry is disclosed which is fully compatible with standard CMOS processing and requires no post processing. The transducer is formed by forming at least one membrane layer, a plurality of back-plate layer sand at least one sacrificial structure such that removal of the sacrificial structure leaves the membrane free to move relative to the fixed back-plate. The method also forms circuit layers on the substrate to form the circuit components and involves sharing layers of material such that at least some of the layers which form the back-plate of the transducer also forms one of the circuit layer sand such layer include at least one metal layer and at least one dielectric layer. The method thus reduces the number of processing steps required compared with sequential fabrication of the circuitry and the transducer. Integrated transducer and electronics devices are also taught.

Abstract translation: 本发明涉及MEMS换能器与同一基板上的电子电路的集成。 公开了一种制造和集成MEMS换能器和电路的方法，其与标准CMOS处理完全兼容，并且不需要后处理。 换能器通过形成至少一个膜层，多个背板层砂形成至少一个牺牲结构而形成，使得去除牺牲结构离开膜相对于固定背板自由移动。 该方法还在衬底上形成电路层以形成电路部件并涉及共享材料层，使得形成换能器的背板的至少一些层也形成电路层砂之一，至少包括 一个金属层和至少一个电介质层。 该方法因此减少了与电路和换能器的顺序制造相比所需的处理步骤的数量。 还教授了集成的传感器和电子设备。

公开(公告)号：WO2009136198A3

公开(公告)日：2010-07-15

申请号：PCT/GB2009050476

申请日：2009-05-07

Applicant: WOLFSON MICROELECTRONICS PLC ,  STEELE COLIN FINDLAY ,  STOJANOVIC GORAN ,  LESSO JOHN PAUL

Inventor： STEELE COLIN FINDLAY ,  STOJANOVIC GORAN ,  LESSO JOHN PAUL

IPC: G01D5/24 ,  H04R3/06

CPC classification number: G01D5/24 ,  G01D3/032 ,  H04R3/00 ,  H04R19/005 ,  H04R19/04

Abstract: A capacitive transducer circuit comprises a capacitive transducer having first and second electrodes. The first and second electrodes are biased by respective first and second bias voltages. An amplifier is connected to receive a first analogue signal on an input terminal, the first analogue signal being generated by the capacitive transducer, and to generate a second analogue signal on an output terminal. A digital feedback circuit is connected between the output terminal of the amplifier and the input terminal of the amplifier. The digital feedback circuit is configured to provide one of said first or second bias voltages. The output of a voltage source which provides the other bias voltage for the capacitive transducer may be filtered by a low pass filter. The low pass filter may comprise a switched capacitor filter circuit.

Abstract translation: 电容式换能器电路包括具有第一和第二电极的电容换能器。 第一和第二电极被相应的第一和第二偏置电压偏置。 放大器被连接以在输入端子上接收第一模拟信号，第一模拟信号由电容换能器产生，并在输出端产生第二模拟信号。 数字反馈电路连接在放大器的输出端和放大器的输入端之间。 数字反馈电路被配置为提供所述第一或第二偏置电压之一。 提供电容换能器的另一个偏置电压的电压源的输出可以被低通滤波器滤波。 低通滤波器可以包括开关电容滤波器电路。

公开(公告)号：WO2010013031A1

公开(公告)日：2010-02-04

申请号：PCT/GB2009/050915

申请日：2009-07-23

Applicant: WOLFSON MICROELECTRONICS PLC ,  SIBBALD, Alastair ,  HOWLE, Martin

Inventor： SIBBALD, Alastair ,  HOWLE, Martin

IPC: H04R29/00

CPC classification number: H04R29/001 ,  H04M1/24

Abstract: An ear simulator has an inlet port (62), for receiving sounds from a speaker (18) of a communications device such a mobile phone handset (12), and has an outlet port (38) in an opposite surface. The ear simulator has at least one additional aperture (60) in the same surface as the inlet port (62), representing acoustic leakage around a mobile phone held against a user's ear. This allows the ear simulator to provide measurement results that more accurately represent the frequency dependent phase response of the transfer function from the handset loudspeaker driver to the ear of a user of the handset.

Abstract translation: 耳模拟器具有入口端口（62），用于从诸如移动电话听筒（12）的通信设备的扬声器（18）接收声音，并且在相对表面中具有出口端口（38）。 耳模拟器在与入口端口（62）相同的表面中具有至少一个额外的孔（60），表示围绕用户耳朵的移动电话周围的声学泄漏。 这允许耳模拟器提供测量结果，该测量结果更准确地表示传递函数从手机扬声器驱动器到听筒用户的耳朵的频率相关相位响应。

公开(公告)号：WO2009136202A1

公开(公告)日：2009-11-12

申请号：PCT/GB2009/050480

申请日：2009-05-07

Applicant: WOLFSON MICROELECTRONICS PLC ,  LESSO, John, Paul

Inventor： LESSO, John, Paul

IPC: H03F1/30 ,  H03F3/185 ,  H03F3/68 ,  H03G3/34 ,  H03M1/00

CPC classification number: H03F1/305 ,  H03F1/304 ,  H03F3/185 ,  H03F3/68 ,  H03F2200/03 ,  H03F2200/331 ,  H03F2200/375 ,  H03F2200/552 ,  H03F2200/78

Abstract: There is provided an audio amplifier circuit (200), comprising: an input, for receiving an input signal; an amplifier (205) for receiving a modified input signal and outputting an amplified signal; and a feedback loop (245) comprising digital circuitry for feeding back the amplified signal and combining a feedback signal with the input signal to generate the modified input signal. The feedback loop (245) comprises: a low-pass filter (220) for filtering the amplified signal; a comparator (225) for comparing the filtered signal with a threshold value and outputting a comparison signal; and an integrator (230) for integrating the comparison signal and outputting the feedback signal. According to another embodiment, the feedback loop comprises an integrator and a sigma-delta modulator.

Abstract translation: 提供了一种音频放大器电路（200），包括：输入端，用于接收输入信号; 放大器（205），用于接收经修改的输入信号并输出​​放大信号; 以及包括用于反馈放大信号并将反馈信号与输入信号组合以产生经修改的输入信号的数字电路的反馈回路（245）。 反馈回路（245）包括：用于对放大信号进行滤波的低通滤波器（220）; 比较器（225），用于将经滤波的信号与阈值进行比较并输出比较信号; 以及用于积分比较信号并输出​​反馈信号的积分器（230）。 根据另一实施例，反馈回路包括积分器和Σ-Δ调制器。