카메라 모듈 및 그 제조 방법
    41.
    发明授权
    카메라 모듈 및 그 제조 방법 失效
    相机模块及其制造方法

    公开(公告)号:KR100813600B1

    公开(公告)日:2008-03-17

    申请号:KR1020060095823

    申请日:2006-09-29

    Inventor: 박명재 신동민

    Abstract: A camera module and a manufacturing method therefor are provided to reduce a facilities scale necessary for processes according as a manufacturing process is simplified and reduce inferior goods which occur in the processes to improve a yield and increase productivity considerably. A window is formed in a substrate(6), and a plurality of electronic components are loaded in the substrate(6). An image sensor(3), installed in a lower surface of the substrate(6), converts light inputted through the window of the substrate(6) into an image signal. A thermosetting tape(9) is attached to an upper surface of the substrate(6). An infrared cut-off filter(7) is attached to the upper surface of the substrate(6) by the thermosetting tape(9). An optical unit includes a housing(2) and a lens barrel(5). The housing(2) is installed in an upper part of the substrate(6) to locate the infrared cut-off filter(7) in the inside. The lens barrel(5) is mounted in an upper part of the housing(2), and at least one or more lenses(4) are laminated and combined in the lens barrel(5).

    Abstract translation: 提供了相机模块及其制造方法,以减少制造过程简化的过程所需的设备规模,并且减少在提高产量和提高生产率的过程中发生的劣质商品。 在基板(6)上形成窗口,并且多个电子部件被装载在基板(6)中。 安装在基板(6)的下表面的图像传感器(3)将通过基板(6)的窗口输入的光转换为图像信号。 热固性胶带(9)附着到基材(6)的上表面。 通过热固性胶带(9)将红外截止过滤器(7)附着到基板(6)的上表面。 光学单元包括壳体(2)和透镜镜筒(5)。 壳体(2)安装在基板(6)的上部,以将红外截止滤光器(7)定位在内部。 镜筒(5)安装在壳体(2)的上部,并且至少一个或多个透镜(4)被层叠并组合在镜筒(5)中。

    CMOS 공정을 이용한 반도체 칩 패키지 및 그 제조방법
    42.
    发明授权
    CMOS 공정을 이용한 반도체 칩 패키지 및 그 제조방법 失效
    半导体芯片封装及其使用CMOS工艺的生产方法

    公开(公告)号:KR100665363B1

    公开(公告)日:2007-01-09

    申请号:KR1020050131325

    申请日:2005-12-28

    Inventor: 김영신 신동민

    Abstract: A semiconductor chip package and a method of manufacturing the same using a CMOS process are provided to reduce a material cost required for a bump construction by allow a pad made of a metal material layer to sever as a bump function. A semiconductor chip package includes a substrate(10) made of a silicon wafer, and a pad(20) formed by depositing metal material on the substrate. The pad has a height corresponding to a bump. SiO2(22) and SiNx(24) are deposited on the substrate, and a photoresist pattern is formed on the SiNx. The SiO2 and SiNx exposed through the photoresist pattern is etched. A metal material is deposited on the photoresist pattern and the substrate, and then is polished to have a predetermined height.

    Abstract translation: 提供一种使用CMOS工艺制造半导体芯片封装及其制造方法,以通过允许由金属材料层制成的焊盘作为凸块功能来消除凸块结构所需的材料成本。 半导体芯片封装包括由硅晶片制成的基板(10)和通过在基板上沉积金属材料形成的焊盘(20)。 垫具有对应于凸块的高度。 SiO 2(22)和SiN x(24)沉积在衬底上,并且在SiNx上形成光刻胶图案。 蚀刻通过光致抗蚀剂图案曝光的SiO 2和SiN x。 将金属材料沉积在光致抗蚀剂图案和基底上,然后被抛光以具有预定的高度。

Patent Agency Ranking