公开(公告)号：KR1020050020423A

公开(公告)日：2005-03-04

申请号：KR1020030058367

申请日：2003-08-22

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  이정영 ,  전상진

IPC: G02F1/1339

Abstract: PURPOSE: An LCD and a method for fabricating the same are provided to increase a space for filling liquid crystal between two substrates by forming spacers on the substrates correspondingly but not in complete pairs. CONSTITUTION: An LCD a plurality of first spacer parts(70) formed on channel parts of TFTs(40) on a first substrate(TFT substrate;10) to be protruded toward a second substrate(color filter substrate;20). A plurality of second spacer parts(55) are formed on black matrix(60) of the second substrate and protruded toward the first substrate, thereby facing the first spacers. At least either the first spacers or the second spacers are formed of photoresist. Some of the first spacers have no corresponding second spacers, for securing spaces for filling liquid crystal.

Abstract translation: 目的：提供一种液晶显示器及其制造方法，以通过相应地但不是完全成对地在衬底上形成衬垫来增加用于在两个衬底之间填充液晶的空间。 构成：LCD，形成在第一基板（TFT基板; 10）上的TFT（40）的通道部分上朝向第二基板（滤色器基板20）突出的多个第一间隔部件（70）。 多个第二间隔件（55）形成在第二基板的黑矩阵（60）上并且朝向第一基板突出，从而面对第一间隔件。 至少第一间隔物或第二间隔物由光致抗蚀剂形成。 一些第一间隔物没有对应的第二间隔物，用于固定用于填充液晶的空间。

公开(公告)号：KR1020050019492A

公开(公告)日：2005-03-03

申请号：KR1020030057295

申请日：2003-08-19

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  전상진 ,  곽상기 ,  최권영 ,  이정영 ,  백범기

IPC: G02F1/136

CPC classification number: H01L29/41733 ,  H01L27/124

Abstract: PURPOSE: A TFT(Thin Film Transistor) substrate and a method for manufacturing the TFT substrate are provided to form a data line having a source electrode and a drain electrode using a passivation layer, a pixel electrode and a contact subsidiary member to reduce the number of photolithography process steps and simplify a manufacturing process. CONSTITUTION: A gate line is formed on a substrate(110). A gate insulating layer(140) and a semiconductor layer(151,154) are sequentially formed on the gate line. A conductive layer is formed on the semiconductor layer. The conductive layer and the semiconductor layer is etched using photolithography. A passivation layer(180) is formed on the substrate and etched using photolithography to expose the first and second parts of the conductive layer. A pixel electrode(190) covering the first part of the conductive layer is formed and the second part of the conductive layer is removed to accomplish a data line(171) and a drain electrode(175) composed of the conductive layer. A part of the semiconductor layer under the second part is exposed.

Abstract translation: 目的：提供TFT（薄膜晶体管）基板和TFT基板的制造方法，以形成具有使用钝化层的源电极和漏极的数据线，像素电极和接触辅助元件以减少数量 的光刻工艺步骤并简化制造工艺。 构成：在衬底（110）上形成栅极线。 栅极绝缘层（140）和半导体层（151,154）依次形成在栅极线上。 在半导体层上形成导电层。 使用光刻法蚀刻导电层和半导体层。 在衬底上形成钝化层（180），并使用光刻法蚀刻以暴露导电层的第一和第二部分。 形成覆盖导电层的第一部分的像素电极（190），去除导电层的第二部分以实现由导电层构成的数据线（171）和漏电极（175）。 在第二部分下面的半导体层的一部分被暴露。

公开(公告)号：KR1020050017898A

公开(公告)日：2005-02-23

申请号：KR1020030055416

申请日：2003-08-11

Applicant: 삼성전자주식회사

Inventor： 전상진 ,  박민욱

IPC: G02F1/136

Abstract: PURPOSE: A TFT(Thin Film Transistor) substrate and a method for fabricating the TFT substrate are provided to prevent a threshold voltage from being varied by forming a nitride layer between an exposed portion of a semiconductor layer and a spacer. CONSTITUTION: A gate line is formed on a substrate(110). A gate insulating layer(140) and a semiconductor layer(151) are sequentially formed on the substrate including the gate line. Lower and upper conductive layers sequentially are formed on the semiconductor layer. The upper conductive layer, the lower conductive layer and the semiconductor layer are selectively etched. A passivation layer(180) is formed on the substrate and selectively etched to expose the first and second portions of the upper conductive layer. The first and second portions of the upper conductive layer are removed to expose the first and second portions of the lower conductive layer. A pixel electrode(190) is formed to cover the first portion of the lower conductive layer. The second portion of the lower conductive layer is removed to expose a part of the semiconductor layer. A nitride layer(70) is formed to cover the exposed part of the semiconductor layer. A spacer(320) is formed on the nitride layer.

Abstract translation: 目的：提供TFT（薄膜晶体管）基板和制造TFT基板的方法，以通过在半导体层的露出部分和间隔物之间​​形成氮化物层来防止阈值电压发生变化。 构成：在衬底（110）上形成栅极线。 在包括栅极线的基板上依次形成栅极绝缘层（140）和半导体层（151）。 下半导体层和上导电层依次形成在半导体层上。 选择性地蚀刻上导电层，下导电层和半导体层。 钝化层（180）形成在衬底上并选择性地蚀刻以暴露上导电层的第一和第二部分。 去除上导电层的第一和第二部分以露出下导电层的第一和第二部分。 形成像素电极（190）以覆盖下导电层的第一部分。 去除下导电层的第二部分以暴露半导体层的一部分。 形成氮化物层（70）以覆盖半导体层的暴露部分。 在氮化物层上形成间隔物（320）。

公开(公告)号：KR1020050017897A

公开(公告)日：2005-02-23

申请号：KR1020030055415

申请日：2003-08-11

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  전상진 ,  유세환 ,  이정영

IPC: G02F1/136

Abstract: PURPOSE: A TFT(Thin Film Transistor) substrate and a method for manufacturing the TFT substrate are provided to reduce the number of photolithography steps and simplify a manufacturing process by separating source and driving electrodes from each other using a passivation layer, a pixel electrode and a contact assistant member. CONSTITUTION: A gate line is formed on a substrate(110). A gate insulating layer(140) and a semiconductor layer(151) are sequentially formed on the gate line. Lower and upper conductive layers are formed on the semiconductor layer. The upper conductive layer, the lower conductive layer and the semiconductor layer are patterned. A passivation layer(180) is formed on the substrate and patterned to expose the first and second portions of the upper conductive layer. The first and second portions of the upper conductive layer are removed to expose the first and second portions of the lower conductive layer. A pixel electrode(190) is formed to cover the first portion of the lower conductive layer. The second portion of the lower conductive layer is removed to expose a part of the semiconductor layer. A spacer(320) is formed on the exposed part of the semiconductor layer.

Abstract translation: 目的：提供TFT（薄膜晶体管）基板和制造TFT基板的方法，以减少光刻步骤的数量，并且通过使用钝化层，像素电极和/或像素电极将源极和驱动电极彼此分离来简化制造过程 联络助理会员 构成：在衬底（110）上形成栅极线。 在栅极线上依次形成栅极绝缘层（140）和半导体层（151）。 下半导体层和上导电层形成在半导体层上。 上导电层，下导电层和半导体层被图案化。 在衬底上形成钝化层（180）并图案化以暴露上导电层的第一和第二部分。 去除上导电层的第一和第二部分以露出下导电层的第一和第二部分。 形成像素电极（190）以覆盖下导电层的第一部分。 去除下导电层的第二部分以暴露半导体层的一部分。 在半导体层的暴露部分上形成间隔物（320）。

公开(公告)号：KR1020050004599A

公开(公告)日：2005-01-12

申请号：KR1020030044845

申请日：2003-07-03

Applicant: 삼성전자주식회사

Inventor： 전상진 ,  박민욱

IPC: G02F1/136

Abstract: PURPOSE: A TFT(Thin Film Transistor) display board is provided to prevent short circuit between a gate line and a storage electrode line by forming the light shielding element so as to be spaced from both the gate line and the storage electrode line. CONSTITUTION: The first conductive layer including a plurality of gate lines, a plurality of storage electrode lines, and a plurality of light shielding elements(60) is formed on an insulating substrate. Each of the storage electrode lines consists of storage electrodes(133a,133b,133c). A gate insulating layer covers the first conductive layer, and a semiconductor layer(151) is formed on the gate insulating layer. The second conductive layer including a plurality of data lines(171) and drain electrodes(175) is formed on the semiconductor layer. A passivation layer covers the second conductive layer. A plurality of pixel electrodes connected to the drain electrodes are formed on the passivation layer. The light shielding elements are disposed adjacently to crossing parts of the gate lines and the data lines and spaced from both the storage electrode lines and the gate lines.

Abstract translation: 目的：提供TFT（薄膜晶体管）显示板，以通过形成屏蔽元件以与栅极线和存储电极线隔开来防止栅极线和存储电极线之间的短路。 构成：在绝缘基板上形成包括多条栅极线，多条存储电极线和多个遮光元件（60）的第一导电层。 每个存储电极线由存储电极（133a，133b，133c）组成。 栅极绝缘层覆盖第一导电层，并且在栅极绝缘层上形成半导体层（151）。 包括多个数据线（171）和漏电极（175）的第二导电层形成在半导体层上。 钝化层覆盖第二导电层。 连接到漏电极的多个像素电极形成在钝化层上。 遮光元件设置成与栅极线和数据线的交叉部分相邻并且与存储电极线和栅极线隔开。

公开(公告)号：KR1020050004413A

公开(公告)日：2005-01-12

申请号：KR1020030044581

申请日：2003-07-02

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  전상진 ,  유세환 ,  이정영

IPC: G02F1/136

Abstract: PURPOSE: A TFT(Thin Film Transistor) display panel and a manufacturing method thereof is provided to control density of the second spacing column for maintaining a cell gap, thereby capable of injecting a liquid crystal easily. CONSTITUTION: Plural gate lines having upper and lower layers are formed on an insulating substrate(110). A gate insulating layer(140) is formed on the gate line. A semiconductor layer(151) is formed on the gate insulating layer. Resistant contact members(161,165) are formed on the semiconductor layer. Source and drain electrodes(173,175) are formed on the resistant contact members. A passivation layer(180) is formed on the source and drain electrodes and has plural contact holes(182,185) for exposing an end portion(179) of a data line(171), the drain electrode and the gate insulating layer adjacent to the drain electrode. Plural pixel electrodes(190) and plural contact assistants(82) are formed on the passivation layer.

Abstract translation: 目的：提供TFT（薄膜晶体管）显示面板及其制造方法，以控制用于保持单元间隙的第二间隔列的密度，从而能够容易地注入液晶。 构成：具有上层和下层的多条栅极线形成在绝缘基板（110）上。 栅极绝缘层（140）形成在栅极线上。 在栅极绝缘层上形成半导体层（151）。 在半导体层上形成有耐受接触构件（161,165）。 源极和漏极电极（173,175）形成在电阻接触构件上。 钝化层（180）形成在源电极和漏电极上，并且具有多个接触孔（182,185），用于暴露数据线（171）的端部（179），漏电极和与漏极相邻的栅极绝缘层 电极。 在钝化层上形成多个像素电极（190）和多个接触助剂（82）。

公开(公告)号：KR1020040008917A

公开(公告)日：2004-01-31

申请号：KR1020020042655

申请日：2002-07-19

Applicant: 삼성전자주식회사

Inventor： 홍권삼 ,  박민욱 ,  이한주

IPC: G02F1/1339

CPC classification number: G02F1/1339 ,  G02F1/1341 ,  G02F1/136209 ,  G02F1/136286 ,  G02F2001/136222 ,  G02F2202/28

Abstract: PURPOSE: A liquid crystal display device is provided to promptly and uniformly harden a sealant by enlarging a contact area between ultraviolet rays and the sealant. CONSTITUTION: A black matrix(220) is formed on an insulating substrate to prevent loss of light. Red, green, and blue color filters are formed at an area defined by the black matrix. A lower substrate(2) includes a plurality of thin film transistors at an active area. Liquid crystal is filled in the active area between an upper substrate and a lower substrate(1). A sealant(310) seals up the edges of the upper substrate and the lower substrate. The black matrix includes exposing patterns(221) formed in unevenness shape to expose the sealant, wherein the black matrix is overlapped with the sealant in a predetermined width.

Abstract translation: 目的：提供一种液晶显示装置，通过扩大紫外线与密封剂之间的接触面积来迅速均匀地硬化密封剂。 构成：在绝缘基板上形成黑矩阵（220），以防止光的损失。 红色，绿色和蓝色滤色器形成在由黑色矩阵限定的区域。 下基板（2）在有源区域上包括多个薄膜晶体管。 液晶填充在上基板和下基板（1）之间的有源区域中。 密封剂（310）密封上基板和下基板的边缘。 黑色矩阵包括形成为凹凸形状的露出图案（221）以露出密封剂，其中黑色矩阵以预定宽度与密封剂重叠。

公开(公告)号：KR101022284B1

公开(公告)日：2011-03-21

申请号：KR1020030057225

申请日：2003-08-19

Applicant: 삼성전자주식회사

Inventor： 전상진 ,  박민욱 ,  이정영

IPC: G02F1/1333

Abstract: 영상의 표시품질을 향상시킨 액정표시장치 및 이의 제조 방법이 개시되어 있다. 액정표시장치를 이루는 제 1 기판에 제 1 얼라인 마크를 형성하고, 제 2 기판에 제 1 얼라인 마크와 얼라인 되는 제 2 얼라인 마크를 형성한다. 제 2 얼라인 마크를 덮고 있는 평탄화막 및 전극에 의하여 공정 설비가 제 2 얼라인 마크를 인식하지 못하는 것을 방지하기 위해 제 2 얼라인 마크를 덮고 있는 평탄화막 및 전극을 일부 제거하여 공정 설비가 제 2 얼라인 마크 및 제 1 얼라인 마크를 보다 정확하게 인식할 수 있도록 하여 제 1 기판 및 제 2 기판의 미스 얼라인먼트를 방지하여, 액정표시장치를 제조하는 과정에서 발생하는 불량을 감소 및 미스 얼라인먼트에 의한 영상의 표시품질 저하를 방지한다.
액정표시장치, 얼라인

公开(公告)号：KR100984352B1

公开(公告)日：2010-09-30

申请号：KR1020030062617

申请日：2003-09-08

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  박정준 ,  곽상기 ,  백범기 ,  이정영

IPC: G02F1/136

Abstract: 절연 기판 상부에는 게이트선을 형성하고, 그 상부에는 게이트 절연막을 적층한다. 이어, 반도체와 저항성 접촉 부재를 차례로 적층하고, 그 상부에 데이터선과 드레인 전극을 형성한 다음, 보호막을 적층하고 그 상부에 감광막 패턴을 형성한다. 이때, 감광막 패턴은 요철 패턴을 가지며 접촉부에 대응하는 제1 부분, 제1 부분보다 두꺼운 제2 부분을 포함한다. 이러한 감광막 패턴을 식각 마스크로 보호막 및 게이트 절연막을 패터닝하여 접촉부에 드레인 전극 및 그 경계선을 드러내는 접촉 구멍을 형성한다. 이때, 접촉 구멍을 통하여 드러난 드레인 전극 경계선 주변에는 게이트 절연막 상부에 보호막이 잔류하여 요철 패턴을 이룬다. 이어, 접촉 구멍을 통하여 드레인 전극과 연결되는 화소 전극을 형성한다.
요철, IZO, 접촉저항, 슬릿, 화소전극

公开(公告)号：KR100980015B1

公开(公告)日：2010-09-03

申请号：KR1020030057295

申请日：2003-08-19

Applicant: 삼성전자주식회사

Inventor： 박민욱 ,  전상진 ,  곽상기 ,  최권영 ,  이정영 ,  백범기

IPC: G02F1/136

CPC classification number: H01L29/41733 ,  H01L27/124

Abstract: 기판 위에 게이트선을 형성하고, 게이트선 위에 게이트 절연막과 반도체층을 연속하여 적층하고, 반도체층 위에 크롬의 도전막을 적층한다. 이어, 도전막 및 반도체층을 사진 식각한 다음, 보호막을 증착하고, 보호막을 사진 식각하여 도전막의 제1 부분과 제2 부분을 노출시킨다. 이어, 도전막의 제1 부분을 덮는 화소 전극을 형성하면서 도전막의 제2 부분을 제거하여 도전막으로 이루어진 데이터선 및 화소 전극과 연결된 드레인 전극을 완성하고 소스 전극 및 드레인 전극 사이의 반도체층의 일부를 노출시킨다. 이어, 반도체층의 노출된 부분 위에 간격재 기둥을 형성한다.
박막트랜지스터표시판, 간격재기둥, 크롬, 알루미늄, ITO, IZO

Abstract translation: 在衬底上形成栅极线，在栅极线上依次层叠栅极绝缘膜和半导体层，并且在半导体层上层叠铬的导电膜。 接下来，对导电膜和半导体层进行光刻，沉积保护膜，并对保护膜进行光刻，以暴露导电膜的第一和第二部分。 接着，在形成覆盖所述第一部分的导电膜的导电膜，以除去第二部分，以完成连接的导电膜制成的像素电极与源极电极和漏极电极之间的半导体层的部分中的数据线和漏电极的像素电极 暴露出来。 然后，在半导体层的暴露部分上形成间隔物。