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公开(公告)号：KR1020040055122A
公开(公告)日：2004-06-26
申请号：KR1020020081736
申请日：2002-12-20
Applicant: 삼성전자주식회사
IPC: G11C7/10
CPC classification number: H04L5/1423
Abstract: PURPOSE: A semiconductor device and a simultaneous bidirectional signal transmission system comprising the same are provided to transmit and receive a 4-level signal bidirectionally at the same time without regard to impedance mismatch, signal interference, serial communication distance and data skew. CONSTITUTION: A simultaneous bidirectional signal transmission system(100) comprises the first semiconductor device(110), the second semiconductor device(140) and a transmission line(130) connected between the first and the second semiconductor device. The first semiconductor device comprises the first output MUX(111) converts the first binary data into the first signal having one level among at least four levels, and the first transmitter(113) being connected to the first output MUX and outputting the first signal to the second semiconductor device through the transmission line. The second semiconductor device comprises the second output MUX(141) converting the second binary data into the second signal having one level among at least four levels, and the second transmitter(143) being connected to the second output MUX and outputting the second signal to the first semiconductor device through the transmission line.
Abstract translation: 目的：提供包括该半导体器件和同时双向信号传输系统的半导体器件和双向信号传输系统，以同时地双向传输和接收4电平信号，而不考虑阻抗失配，信号干扰，串行通信距离和数据偏移。 构成：同时双向信号传输系统（100）包括第一半导体器件（110），第二半导体器件（140）和连接在第一和第二半导体器件之间的传输线（130）。 第一半导体器件包括第一输出MUX（111）将第一二进制数据转换成具有至少四个电平中的一个电平的第一信号，并且第一发射器（113）连接到第一输出多路复用器，并将第一信号输出到 第二个半导体器件通过传输线。 第二半导体器件包括将第二二进制数据转换成具有至少四个电平中的一个电平的第二信号的第二输出MUX（141），并且第二发射器（143）连接到第二输出MUX，并将第二信号输出到 第一个半导体器件通过传输线。
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公开(公告)号：KR1020040041985A
公开(公告)日：2004-05-20
申请号：KR1020020070098
申请日：2002-11-12
Applicant: 삼성전자주식회사
IPC: H03L7/08
Abstract: PURPOSE: A delay locked loop(DLL) is provided to output the inner clock signal with positioning it at the center of the effective data by automatically controlling the phase of the inner clock signal in the DLL. CONSTITUTION: A delay locked loop(DLL) includes a first DLL, a phase difference detection and counting block(100) and a second DLL. The first DLL generates a first inner clock signal of which phase is synchronized to the external clock signal by using a signal generated by detecting and counting the phase difference of the external clock signal and the first inner clock signal. The phase difference detection and counting block(100) performs the counting by detecting the phase difference between the first inner clock signal and the second inner clock signal. And, the second DLL generates the second inner clock signal with correcting the phase of the first inner clock signal by using a signal which is obtained by adding a signal generated by performing the detection and counting the phase difference between the external clock signal and the first inner clock signal to a signal outputted from the phase difference detection and counting block(100).
Abstract translation: 目的：通过自动控制DLL内部时钟信号的相位，提供延迟锁定环（DLL）以输出内部时钟信号，将其定位在有效数据的中心。 构成：延迟锁定环（DLL）包括第一DLL，相位差检测和计数块（100）和第二DLL。 第一DLL通过使用通过检测和计数外部时钟信号和第一内部时钟信号的相位差产生的信号来产生其相位与外部时钟信号同步的第一内部时钟信号。 相位差检测和计数块（100）通过检测第一内部时钟信号和第二内部时钟信号之间的相位差来执行计数。 并且，第二DLL通过使用通过将通过执行检测生成的信号相加而获得的信号来校正第一内部时钟信号的相位，并且对外部时钟信号和第一内部时钟信号的第一 内部时钟信号输出到从相位差检测和计数块（100）输出的信号。
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公开(公告)号：KR1020040026576A
公开(公告)日：2004-03-31
申请号：KR1020020058120
申请日：2002-09-25
Applicant: 삼성전자주식회사
Inventor： 최정환
IPC: H03K19/00
CPC classification number: H04L25/061 , H04L5/1423
Abstract: PURPOSE: A simultaneous bidirectional input/output circuit for improving a data input margin is provided to increase the data input margin and regenerate data by improving a structure of a bidirectional input/output circuit. CONSTITUTION: A simultaneous bidirectional input/output circuit for improving a data input margin includes a bus line(330), an input terminal(310), an output buffer(320), and an input buffer(350). The output buffer(320) is connected between the bus line(330) and the input terminal(310) in order to receive signals from the input terminal and transmit the signals to the bus line. The input buffer(350) is connected between the bus line(330) and the input terminal(310) in order to regenerate input signals by comparing two reference signals of three reference signals having different levels according to states of the signals of the input terminal and the input signals of the outside with the signals of the bus line determined by output signals of the output buffer.
Abstract translation: 目的：提供一种用于提高数据输入余量的同时双向输入/输出电路，以通过改进双向输入/输出电路的结构来增加数据输入余量并重新生成数据。 构成：用于改善数据输入余量的同时双向输入/输出电路包括总线（330），输入端（310），输出缓冲器（320）和输入缓冲器（350）。 输出缓冲器（320）连接在总线（330）和输入端（310）之间，以便从输入端接收信号并将信号发送到总线。 输入缓冲器（350）连接在总线（330）和输入端子（310）之间，以通过根据输入端子的信号的状态比较具有不同电平的三个参考信号的两个参考信号来再生输入信号 以及由输出缓冲器的输出信号决定的总线线路信号的外部输入信号。
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公开(公告)号：KR100416621B1
公开(公告)日：2004-02-05
申请号：KR1020020023271
申请日：2002-04-27
Applicant: 삼성전자주식회사
IPC: G11C7/00
CPC classification number: H03K5/125
Abstract: Data input receivers reproduce data signals, and methods detect data signals in data input receivers. The invention receives an input data signal and two reference signals, which may be complementary. A first voltage difference between the input data signal and the first reference signal is amplified, and a second voltage difference between the input data signal and the second reference signal is amplified. The amplified first voltage difference and the amplified second voltage difference are received on the same pair of output terminals, which are then compared to generate the reproduced data signal.
Abstract translation: 数据输入接收器再现数据信号，并且方法检测数据输入接收器中的数据信号。 本发明接收输入数据信号和两个可以互补的参考信号。 输入数据信号与第一参考信号之间的第一电压差被放大，并且输入数据信号与第二参考信号之间的第二电压差被放大。 放大的第一电压差和放大的第二电压差在同一对输出端子上接收，然后进行比较以产生再现数据信号。
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公开(公告)号：KR1020030035417A
公开(公告)日：2003-05-09
申请号：KR1020010067499
申请日：2001-10-31
Applicant: 삼성전자주식회사
IPC: H04L25/00
CPC classification number: H04L25/0272 , H04L25/0264
Abstract: PURPOSE: A system realizing differential signal manner using two DC reference signals is provided to be capable of receiving data in a differential signal manner using two DC reference signals. CONSTITUTION: A transmission part(310) transmits input data via signal lines(311-335), and a receiver part(350) receives the input data via the signal lines. The receiver part(350) compares the input data with the first reference signal(VREF1) and the second reference signal(VREF2), amplifies a comparison result and detects the input data. The first reference signal and the second reference signal have a DC voltage level. At least one of the transmission part and the receiver part has a reference signal generating part(311/351) for generating the first reference signal and the second reference signal.
Abstract translation: 目的：提供使用两个直流参考信号实现差分信号方式的系统，能够使用两个直流参考信号以差分信号方式接收数据。 构成：发送部（310）经由信号线（311-335）发送输入数据，接收部（350）经由信号线接收输入数据。 接收器部分（350）将输入数据与第一参考信号（VREF1）和第二参考信号（VREF2）进行比较，放大比较结果并检测输入数据。 第一参考信号和第二参考信号具有直流电压电平。 传输部分和接收机部分中的至少一个具有用于产生第一参考信号和第二参考信号的参考信号产生部分（311/351）。
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Patent Agency Ranking
公开(公告)号：KR1019990039098A
公开(公告)日：1999-06-05
申请号：KR1019970059060
申请日：1997-11-10
Applicant: 삼성전자주식회사
IPC: G11C29/00
Abstract: 파켓에 의해 동작하고, 다수의 출력 파이프라인들 및 다이렉트 엑세스 모드를 구비하는 반도체 메모리 장치에 있어서, 비교부, 제 1 내지 제 2 스위칭 소자, 다수의 제 3 스위칭 소자들, 및 다수의 출력 구동부들을 구비하는 반도체 메모리 장치가 개시되어 있다. 비교부는 다이렉트 엑세스 모드 제어 신호에 의해서 제어되어, 다수의 출력 파이프라인들로부터 출력되는 데이터들을 입력하여 이에 따라 해당되는 제 1 내지 제 2 비교 출력 신호들을 출력한다. 제 1 내지 제 2 스위칭 소자는 다이렉트 엑세스 모드 제어 신호에 의해서 제어되어, 비교부로부터 출력되는 제 1 내지 제 2 비교 출력 신호를 입력하여 스위칭한다. 다수의 제 3 스위칭 소자들은 다이렉트 엑세스 모드 제어 신호에 의해서 제어되어, 다수의 출력 파이프라인들로부터 출력되는 신호들 중에서 해당되는 신호를 입력하여 스위칭한다. 다수의 출력 구동부들은 각각, 제 1 내지 제 2 스위칭 소자, 및 다수의 제 3 스위칭 소자들로부터 출력되는 신호들 중에서 해당되는 신호를 입력하고, 이를 구동 출력한다. 본 발명에 의하면, 테스트 모드에서의 데이터 입출력을 위하여 필요로 하는 입출력 핀들의 수를 줄임과 동시에 또한 테스트의 정확성을 더욱 높일 수 있는 효과를 가진다.
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公开(公告)号：KR1020210013262A
公开(公告)日：2021-02-03
申请号：KR1020210010755
申请日：2021-01-26
Applicant: 삼성전자주식회사
IPC: G06F3/0481 , G06F3/0484 , G06F3/0488 , G06F3/041 , G06F3/14
Abstract: 터치스크린을포함하는디스플레이장치의제어방법이개시된다. 본발명에의한제어방법은, 상기터치스크린상에, 각각이어플리케이션을실행하는복수개의윈도우를서로중첩되지않도록표시하는과정과, 상기복수개의윈도우를구분하는복수개의경계선의교차점에배치되는센터버튼을표시하는과정과, 상기터치스크린상에, 상기복수개의윈도우중 적어도하나의크기를변경하도록하는윈도우크기변경명령을입력받는과정과, 상기윈도우크기변경명령에대응하여상기복수개의윈도우중 적어도하나의크기를변경하여표시하는과정과상기복수개의윈도우중 일부윈도우를표시하지않도록제어하면서, 나머지윈도우의크기를확대하여표시하는과정을포함한다.
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公开(公告)号：KR102210278B1
公开(公告)日：2021-02-02
申请号：KR1020130096206
申请日：2013-08-13
Applicant: 삼성전자주식회사
IPC: G06F3/0481 , G06F3/14 , G06F3/041
Abstract: 터치스크린을포함하는디스플레이장치의제어방법이개시된다. 본발명에의한제어방법은, 상기터치스크린상에, 각각이어플리케이션을실행하는복수개의윈도우를서로중첩되지않도록표시하는과정과, 상기복수개의윈도우를구분하는복수개의경계선의교차점에배치되는센터버튼을표시하는과정과, 상기터치스크린상에, 상기복수개의윈도우중 적어도하나의크기를변경하도록하는윈도우크기변경명령을입력받는과정과, 상기윈도우크기변경명령에대응하여상기복수개의윈도우중 적어도하나의크기를변경하여표시하는과정과상기복수개의윈도우중 일부윈도우를표시하지않도록제어하면서, 나머지윈도우의크기를확대하여표시하는과정을포함한다.
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公开(公告)号：KR101914488B1
公开(公告)日：2018-11-05
申请号：KR1020110031685
申请日：2011-04-06
Applicant: 삼성전자주식회사
Abstract: 다양한실시예에따른푸시알림서비스를제공하기위한푸시알림서버클러스터는, 푸시알림제공서버로부터푸시알림이벤트를수신하는것에기반하여전자장치에푸시알림을전달하도록설정된제1 서버및 상기푸시알림서비스를등록하기위해상기전자장치로부터의요청에기반하여상기푸시알림을전달하기위한복수의서버들중 상기제1 서버를상기전자장치에할당하고, 상기푸시알림을전달하기위한정보를상기전자장치에제공하도록설정된제2 서버를포함하는것을특징으로한다.
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