公开(公告)号：GB2128401B

公开(公告)日：1986-02-26

申请号：GB8325513

申请日：1983-09-23

Applicant: HITACHI LTD

Inventor： NAGASAWA KOUICHI ,  IKEDA SHUJI ,  SUZUKI NORIO ,  SAKAI YOSHIO

IPC: H01L27/092 ,  H01L21/033 ,  H01L21/762 ,  H01L21/8238 ,  H01L27/08 ,  H01L27/105 ,  H01L29/78 ,  H01L27/06

Abstract: Disclosed is a method of manufacturing a semiconductor device which includes MOSFETs of the two-channel conductivity types of P- and N-channel types on a single semiconductor substrate. According to the present invention, a first mask and a second mask are used. The first mask covers that surface part of the semiconductor substrate in which the P-channel type MOSFET is to be formed, and it serves as a mask when an N-type impurity is introduced into the semiconductor substrate. The first mask has a property and etching rate different from those of a film formed by the thermal oxidation of the semiconductor substrate surface. The second mask covers that surface part of the semiconductor substrate which has been formed with the N-channel type MOSFET, and it serves as a mask when a P-type impurity is introduced into the semiconductor substrate. The second mask is used as an inter-layer insulator film.

公开(公告)号：HK5486A

公开(公告)日：1986-01-31

申请号：HK5486

申请日：1986-01-23

Applicant: HITACHI LTD

Inventor： HOKARI SADAO ,  SAKAI YOSHIO ,  KUROSAWA TOSHIAKI ,  INABA HIROMI ,  KUROHA HIROAKI ,  HATAKEYAMA TAKANOBU ,  SHIMA SEIYA ,  ANDO TAKEKI

IPC: H02M7/04 ,  H02M3/158 ,  H02M7/12 ,  H02M7/155 ,  H02M7/162 ,  H02M7/21

Abstract: The system converts electric power between ac (Ea) and dc (EL) and includes a chopping circuit (GTO1, GTO2;) connected to the dc output side of a full-wave thyristor bridge circuit (U1-W2; U1-W1, D1-D2; R1-S2). The system is controlled to reduce the output voltage from a maximum to a zero value by first reducing the duty cycle of the chopping circuit until a minimum pulse width is reached and then reducing the phase angle of firing of the thyristors of the bridge circuit. The arrangement enables conversion from max. to zero dc voltage with a high power factor.

公开(公告)号：GB2144560A

公开(公告)日：1985-03-06

申请号：GB8416886

申请日：1984-07-03

Applicant: HITACHI LTD

Inventor： INABA HIROMI ,  NAKASHIMA HAJIME ,  KIWAKI HISAKATSU ,  UEDA AKITERU ,  ANDO TAKEKI ,  KUROSAWA TOSHIAKI ,  SAKAI YOSHIO

IPC: B66B1/24 ,  B66B1/16 ,  B66B1/40 ,  B66B1/44 ,  G05B23/02 ,  B66B1/36 ,  B66B5/00

Abstract: In an elevator wherein an elevator cage is repeatedly run among a plurality of floors by controlling a cage driving motor in accordance with a velocity command; a floor arrival error involved when the elevator cage has arrived at the floor is detected, and the velocity command for the subsequent operation is corrected in accordance with the floor arrival error, thereby to enhance the floor arrival precision.

公开(公告)号：GB2108783A

公开(公告)日：1983-05-18

申请号：GB8227731

申请日：1982-09-29

Applicant: HITACHI LTD

Inventor： HATAKEYAMA TAKANOBU ,  SHIMA SEIYA ,  ANDO TAKEKI ,  KUROSAWA TOSHIAKI ,  INABA HIROMI ,  KUROHA HIROAKI ,  HOKARI SADAO ,  SAKAI YOSHIO

IPC: H02M7/04 ,  H02M3/158 ,  H02M7/12 ,  H02M7/155 ,  H02M7/162 ,  H02M7/21

Abstract: The system converts electric power between ac (Ea) and dc (EL) and includes a chopping circuit (GTO1, GTO2;) connected to the dc output side of a full-wave thyristor bridge circuit (U1-W2; U1-W1, D1-D2; R1-S2). The system is controlled to reduce the output voltage from a maximum to a zero value by first reducing the duty cycle of the chopping circuit until a minimum pulse width is reached and then reducing the phase angle of firing of the thyristors of the bridge circuit. The arrangement enables conversion from max. to zero dc voltage with a high power factor.

公开(公告)号：DE3036869A1

公开(公告)日：1981-04-16

申请号：DE3036869

申请日：1980-09-30

Applicant: HITACHI LTD

Inventor： MASUHARA TOSHIAKI ,  MINATO OSAMU ,  SHIMOHIGASHI KATSUHIRO ,  MASUDA HIROO ,  SUNAMI HIDEO ,  SAKAI YOSHIO ,  KAMIGAKI YOSHIAKI ,  TAKEDA EIJI ,  HAGIWARA YOSHIMUNE

IPC: G11C8/10 ,  G11C17/16 ,  G11C17/18 ,  G11C29/00 ,  H01L21/263 ,  H01L21/268 ,  H01L21/768 ,  H01L23/525 ,  H01L27/10 ,  G11C5/12 ,  G06F11/20 ,  H01L27/04 ,  H01L21/72 ,  H01L23/56

Abstract: A programmable semiconductor integrated circuitry including a circuit programming element is disclosed. The circuit programming element can be activated in a short-circuit mode by the irradiation of a laser or electron beam or by ion implantation so that it is converted from its original nonconductive state into a conductive or conductable state, thereby providing electrical connection between circuits and/or circuit elements of the integrated circuitry for a desired circuit programming such as circuit creation, circuit conversion or circuit substitution.

公开(公告)号：CA1042978A

公开(公告)日：1978-11-21

申请号：CA231341

申请日：1975-07-14

Applicant: HITACHI LTD

Inventor： SAKAI YOSHIO ,  KUROSAWA TOSHIAKI

IPC: B66B1/24 ,  B66B1/30 ,  B66B5/02 ,  B66B5/06 ,  H02P3/08 ,  H02P7/34 ,  H02P7/343 ,  H02P7/06

Abstract: OVER-SPEED PREVENTING APPARATUS FOR DC MOTOR An over-speed preventing apparatus for a DC motor comprises a DC motor the speed of which is controlled by the adjustment of the armature voltage thereof. A rectifier circuit supplies power to the separately-excited field winding of the motor. A predetermined field current command is generated and the actual field current is detected. A constant current control system controls the rectifier circuit in accordance with the error between the field current command and the detected value of the field current. The apparatus further comprises a unidirectional element connected in parallel to the field winding in the direction in which the field current is made to flow back. A current decrease detector is inserted between the rectifier circuit and the parallel circuit including the field winding and the unidirectional element. A protecting device is energized by the current decrease detector.

公开(公告)号：AU8305975A

公开(公告)日：1977-01-20

申请号：AU8305975

申请日：1975-07-15

Applicant: HITACHI LTD

Inventor： SAKAI YOSHIO ,  KUROSAWA TOSHIAKI

IPC: B66B1/24 ,  B66B1/30 ,  B66B5/02 ,  B66B5/06 ,  H02P3/08 ,  H02P7/34 ,  H02P7/343 ,  H02H7/09 ,  B66B1/06

Abstract: An over-speed preventing apparatus for the DC motor comprises a DC motor the speed of which is controlled by the adjustment of the armature voltage thereof, controlled-rectifier means for supplying power to the separately excited field winding of the motor, means for generating a predetermined field current command, means for detecting the field current, and a constant current control system for controlling the rectifier means in accordance with the error between the field current command and the detected value of the field current. The apparatus further comprises a unidirectional element connected in parallel to the field winding in the direction in which the field current is made to flow back, current decrease detector means inserted between the rectifier circuit and the parallel circuit including the field winding and the unidirectional element, and protecting means energized by the current decrease detector means.

公开(公告)号：HK1023550A1

公开(公告)日：2000-09-15

申请号：HK00102722

申请日：2000-05-04

Applicant: HITACHI LTD ,  HITACHI BUILDING SYS CO LTD

Inventor： NAKADA TAKANORI ,  NIHEI HIDEKI ,  NAGASE HIROSHI ,  IYODA HIROUMI ,  ARABORI NOBORU ,  SHIBUKAWA SUETARO ,  HINO NORIAKI ,  NOKITA AKIHIRO ,  SAKAI YOSHIO ,  SHIOHATA KOKI

IPC: B66B11/08 ,  B66B11/00 ,  B66B11/04 ,  B66D1/12 ,  B66B

公开(公告)号：GB2243906B

公开(公告)日：1994-03-02

申请号：GB9104342

申请日：1991-03-01

Applicant: HITACHI LTD

Inventor： SUZUKI MASATO ,  INABA HIROMI ,  TAKENAGA HIROSHI ,  OONUMA NAOTO ,  NAKAMURA KIYOSHI ,  SAKAI YOSHIO ,  YONEDA KENJI ,  NAKATA NAOFUMI ,  KASAI SYOJI ,  YAMAZAKI MASACHIKA

IPC: B66B3/00 ,  B65H3/00 ,  B66B1/20 ,  B66B1/24 ,  B66B1/34 ,  G05B13/02 ,  G06T1/00 ,  G06T7/60 ,  H04N7/18 ,  G06F15/70

Abstract: An image of an elevator hall or an inside of elevator car is acquired by photographing apparatus, and the number of waiting passenger is detected by comparing the above-mentioned image with a background image when no passenger is present at the elevator hall. Second image processing apparatus with high precision is prepared by the same image information as that of first image processing apparatus, teacher information derived therefrom is compared with an output from the first image processing apparatus. If the teacher information is not coincident with the output from the first image processing means, parameters required for performing the image process by the first image processing appartus, for instance, constants, threshold values and weight coefficients employed in an image processing algorithm are adjusted.

公开(公告)号：HK126893A

公开(公告)日：1993-11-26

申请号：HK126893

申请日：1993-11-18

Applicant: HITACHI LTD

Inventor： YONEDA KENJI ,  SAKAI YOSHIO ,  MATSUMARU HIROSHI ,  TOBITA TOSHIMITSU ,  YASUNOBO SEIJI

IPC: B66B1/34 ,  B66B3/00 ,  H04Q9/00

Abstract: A control system for an elevator has a plurality of elevator information generation devices each of which has an information output unit which outputs elevator information to an elevator controller and also to at least one display controller which generates one or more on elevator displays. There are a plurality of display controllers, these are preferably connected to the information output units by a common transmission path. There may be a plurality of elevator controllers, when there are a plurality of elevator cabs, and those elevator controllers may all be connected to the common transmission path. There is then a supervisor controller for controlling the elevator controllers.