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公开(公告)号：BR9301123A
公开(公告)日：1993-10-05
申请号：BR9301123
申请日：1993-03-10
Applicant: IBM
Inventor： BRIGIDA DAVID J , MOORE VICTOR S , ROBINSON JAMES E
Abstract: A method and system are disclosed for automatically selecting an optimum modem protocol in a distributed data processing system which includes a modem which supports multiple protocols which is coupled to a cellular communications system. Known cellular communications systems generate a Received Signal Strength Indicator (RSSI) and a Service Access Tone (SAT) which may be utilized by a cellular telephone to determine the amplitude of a received signal and to optimize a path through the cellular communication system for voice communications. The Service Access Tone (SAT) is generally utilized to control the "hand off" of a communication session to a new cell and provides an indication of the quality of the existing path through the cellular communication system. After initiating communication between a first modem and a second modem, the method and system of the present invention automatically determines the channel quality within the cellular communication system by utilizing the Received Signal Strength Indicator (RSSI) and the Service Access Tone (SAT). These signals are analyzed, in conjunction with the bit error rate of the dotting sequence transmitted by the answering modem, to achieve an indication of the quality of the cellular communications channel. In response to an analysis of these factors a particular protocol may be selected which is optimum for existing channel conditions.
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42.发明专利
公开(公告)号：CA1199415A
公开(公告)日：1986-01-14
申请号：CA440045
申请日：1983-10-31
Applicant: IBM
Inventor： THOMA NANDOR G , MOORE VICTOR S , KRAFT WAYNE R
Abstract: MICROWORD GENERATION MECHANISM UTILIZING A SEPARATE BRANCH DECISION PROGRAMMABLE LOGIC ARRAY A microword generation mechanism is provided for producing the sequences of microwords used to control the execution of processor instructions in a microprogrammed digital data processor. This microword generation mechanism includes programmable logic array means responsive to the processor instructions for producing the appropriate microword sequences. The microword generation mechanism also includes condition indicator circuitry for supplying indicator signals indicating whether the results of arithmetic and logic operations in the processor meet certain types of conditions. The microword generation mechanism further includes a condition testing programmable logic array responsive to the condition field of a conditional branch type processor instruction for testing the appropriate indicator signal or signals and causing a branch type microword sequence to be produced if the specified condition is met.
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公开(公告)号：CA1149071A
公开(公告)日：1983-06-28
申请号：CA363530
申请日：1980-10-29
Applicant: IBM
Inventor： MOORE VICTOR S , KRAFT WAYNE R , RHODES JOSEPH C JR , STAHL WILLIAM L JR
Abstract: A FLEXIBLE PROCESSOR ON A SINGLE SEMICONDUCTOR SUBSTRATE A processor is provided that is fabricated on a single semiconductor substrate. The processor includes an AND array for receiving program instructions from input sources external of the processor and for generating product signals. An OR array is provided and interconnected to the AND array for receiving the product signals and for generating a plurality of control signals. A register array receives ones of the plurality of control signals and transfers data between the processor and data sources external of the processor. An arithmetic and logic unit array is also provided on the semiconductor substrate and interconnected to the register array and the OR array for executing operations on data received from the register array in accordance with ones of the plurality of control signals to generate output data. A control register is further provided and is interconnected to the OR array and the AND array for receiving ones of the plurality of control signals for controlling execution of the program instructions within the AND array.
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