公开(公告)号：US20210345519A1

公开(公告)日：2021-11-04

申请号：US17359405

申请日：2021-06-25

Applicant: Intel Corporation

Inventor： Wenbin Tian ,  Yingqiong Bu ,  Yanbing Sun ,  Yang Yao ,  Yuehong Fan ,  Ming Zhang ,  Casey Robert Winkel ,  Jin Yang ,  David Shia ,  Mohanraj Prabhugoud

IPC: H05K7/20 ,  H01L23/367 ,  H01L23/427 ,  H01L23/40

Abstract: Techniques for reconfigurable heat sinks are disclosed. In one embodiment, a compute system includes a heat sink includes a core fin assembly with two removable lateral fin assemblies. The lateral fin assemblies may be above one or more components of the compute system, such as one or more memory modules. With the lateral fin assemblies in place, the cooling capacity of the heat sink is increased, but the more memory modules may be difficult or impossible to service. With the lateral fin assemblies removed, the memory modules can be serviced (e.g., replaced). In another embodiment, a lateral fin assembly of a heat sink is attached to a heat pipe. The lateral fin assembly can rotate relative to the heat pipe, allowing the lateral fin assembly to fit within a 2U form factor in one configuration and allow access to components under the lateral fin assembly in another configuration.

公开(公告)号：US20210193558A1

公开(公告)日：2021-06-24

申请号：US17187470

申请日：2021-02-26

Applicant: Intel Corporation

Inventor： Ralph V. Miele ,  Phil Geng ,  Mengqi Liu ,  David Shia ,  Sandeep Ahuja ,  Eric W. Buddrius ,  Jeffory L. Smalley

IPC: H01L23/40

Abstract: Techniques for processor loading mechanisms are disclosed. In the illustrative embodiment, a heat sink is in contact with a top surface of a processor, applying a downward force on the processor. A load plate is also in contact with the processor, applying a downward force to the processor as well. The combination of the downward force from the load plate and the heat sink keep the processor in good physical contact with pins of the processor socket. The heat sink has enough force applied to the processor to be in good thermal contact with the processor without applying higher stress to the heat sink. The load plate can apply force to the processor without regard to the thermal characteristics of the load plate. Other embodiments are envisioned and described.

公开(公告)号：US20190302857A1

公开(公告)日：2019-10-03

申请号：US15942280

申请日：2018-03-30

Applicant: INTEL CORPORATION

Inventor： Eric W. Buddrius ,  Ralph V. Miele ,  Mohanraj Prabhugoud ,  David Shia ,  Jeffory L. Smalley

IPC: G06F1/18 ,  H05K7/14 ,  H05K7/16 ,  H05K7/18 ,  H05K7/20

Abstract: A microprocessor loading mechanism, comprising a bolster plate surrounding an aperture, wherein the opening is to receive a microprocessor socket, one or more torsion bars coupled to the bolster plate, and a stud coupled to each of the one or more torsion bars, wherein each stud is to receive a nut to secure a microprocessor package to the microprocessor socket within the aperture and wherein each stud is secured to the bolster plate by each corresponding torsion bar.

公开(公告)号：US09354273B2

公开(公告)日：2016-05-31

申请号：US13725255

申请日：2012-12-21

Applicant: Intel Corporation

Inventor： Kip Stevenson ,  Todd P. Albertson ,  David Shia ,  Kamil Salloum

IPC: G01R31/28 ,  G01R3/00 ,  G01R1/067

CPC classification number: G01R1/06755 ,  G01R3/00 ,  G01R31/26 ,  G01R31/2886

Abstract: An examples includes a substrate, including a conductive trace and a layer disposed on top of the conductive trace, the layer defining at least one cavity extending to the conductive trace and an electrical probe disposed in the cavity, with solder coupling the electrical probe to the conductive trace. The electrical probe can include a high yield strength wire core including a refractory metal and a thin oxidation protection layer concentrically disposed around high yield strength wire core and providing an outside surface of the electrical probe, the thin oxidation protection layer including predominantly one or more materials selected from gold, platinum, ruthenium, rhodium, palladium, osmium, iridium, chromium, and combinations thereof, wherein the solder fills the cavity and is coupled to the electrical probe inside the cavity, disposed between the electrical probe and the layer.

Abstract translation: 示例包括基板，其包括导电迹线和设置在导电迹线顶部上的层，该层限定延伸到导电迹线的至少一个空腔和设置在该空腔中的电探针，焊料将电探针耦合到 导电痕迹 电探针可以包括高屈服强度的线芯，包括耐火金属和同心地设置在高屈服强度线芯周围的薄氧化保护层，并提供电探针的外表面，薄氧化保护层主要包括一种或多种材料 选自金，铂，钌，铑，钯，锇，铱，铬及其组合，其中焊料填充空腔并且耦合到设置在电探针和层之间的腔内的电探针。