公开(公告)号：US10277219B2

公开(公告)日：2019-04-30

申请号：US15639834

申请日：2017-06-30

Applicant: Infineon Technologies AG

Inventor： Rainald Sander ,  Andreas Meiser

IPC: H03K17/08 ,  H01L23/00

Abstract: In accordance with an embodiment, an electronic circuit includes a first transistor device, at least one second transistor device, and a drive circuit. The first transistor device is integrated in a first semiconductor body, and includes a first load pad at a first surface of the first semiconductor body and a control pad and a second load pad at a second surface of the first semiconductor body. The at least one second transistor device is integrated in a second semiconductor body, and includes a first load pad at a first surface of the second semiconductor body and a control pad and a second load pad at a second surface of the second semiconductor body. The first load pad of the first transistor device and the first load pad of the at least one second transistor device are mounted to an electrically conducting carrier.

公开(公告)号：US10128750B2

公开(公告)日：2018-11-13

申请号：US15060737

申请日：2016-03-04

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Steffen Thiele

IPC: H02M3/156 ,  H01L29/10 ,  H01L29/06 ,  H01L29/40 ,  H01L29/78

Abstract: A switched-mode power converter includes an inductive storage element and a cascode circuit. The cascode circuit includes a double-gate field effect transistor. A switchable load path of the double-gate field effect transistor is electrically connected in series with the inductive storage element.

公开(公告)号：US10109734B2

公开(公告)日：2018-10-23

申请号：US15095615

申请日：2016-04-11

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L29/78 ,  H01L29/10 ,  H01L29/08 ,  H01L29/66 ,  H01L29/06 ,  H01L29/40 ,  H01L29/417

Abstract: A semiconductor device comprises a transistor in a semiconductor body having a first main surface. The transistor comprises a source region of a first conductivity type, a drain region, a body region of a second conductivity type, different from the first conductivity type, and a gate electrode disposed in gate trenches extending in a first direction parallel to the first main surface. The source region, the body region and the drain region are arranged along the first direction. The body region comprises first ridges extending along the first direction, the first ridges being disposed between adjacent gate trenches in the semiconductor body. The body region further comprises a second ridge. A width of the second ridge is larger than a width of the first ridges, the widths being measured in a second direction perpendicular to the first direction.

公开(公告)号：US20170358650A1

公开(公告)日：2017-12-14

申请号：US15614651

申请日：2017-06-06

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Franz Hirler ,  Till Schloesser

IPC: H01L29/40 ,  H01L29/10 ,  H01L29/739 ,  H01L29/78

CPC classification number: H01L29/404 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/10 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/66696 ,  H01L29/66704 ,  H01L29/7393 ,  H01L29/7816 ,  H01L29/7825

Abstract: A semiconductor device includes a transistor in a semiconductor substrate. The transistor includes a drift zone of a first conductivity type adjacent to a drain region, and a first field plate and a second field plate adjacent to the drift zone. The second field plate is arranged between the first field plate and the drain region. The second field plate is electrically connected to a contact portion arranged in the drift zone. The transistor further includes an intermediate portion of the first conductivity type at a lower doping concentration than the drift zone. A distance between the intermediate portion and the drain region is smaller than the distance between the contact portion and the drain region.

公开(公告)号：US09620637B2

公开(公告)日：2017-04-11

申请号：US13902151

申请日：2013-05-24

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser ,  Franz Hirler

IPC: H01L29/76 ,  H01L29/78 ,  H01L29/94 ,  H01L31/113 ,  H01L27/115 ,  H01L21/28 ,  H01L23/48 ,  H01L29/88 ,  H01L29/66 ,  H01L29/739

CPC classification number: H01L29/7813 ,  H01L29/66204 ,  H01L29/66734 ,  H01L29/7391

Abstract: A semiconductor device formed in a semiconductor substrate includes a source region, a drain region, a gate electrode, and a body region disposed between the source region and the drain region. The gate electrode is disposed adjacent at least two sides of the body region, and the source region and the gate electrode are coupled to a source terminal. A width of the body region between the two sides of the body region is selected so that the body region is configured to be fully depleted.

公开(公告)号：US20160322347A1

公开(公告)日：2016-11-03

申请号：US15139800

申请日：2016-04-27

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L27/06 ,  H05B37/02 ,  H05B33/08 ,  H02M3/155 ,  H05B1/02

Abstract: A switch comprises a field effect transistor in a semiconductor substrate having a first main surface. The field effect transistor comprises a source region, a drain region, a body region, and a gate electrode at the body region, the gate electrode being configured to control a conductivity of a channel formed in the body region. The gate electrode is disposed in gate trenches. The body region is disposed along a first direction between the source region and the drain region, the first direction being parallel to the first main surface. The body region has a shape of a ridge extending along the first direction. The body region is adjacent to the source region and the drain region. The switch further comprises a source contact and a body contact portion, the source contact being electrically connected to a source terminal. The body contact portion is in contact with the source contact and is electrically connected to the body region.

Abstract translation: 开关包括具有第一主表面的半导体衬底中的场效应晶体管。 场效应晶体管包括源区域，漏极区域，体区域和在体区域处的栅电极，栅电极被配置为控制在体区域中形成的沟道的导电性。 栅电极设置在栅极沟槽中。 主体区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于第一主表面。 身体区域具有沿着第一方向延伸的脊的形状。 体区域与源极区域和漏极区域相邻。 该开关还包括源极接触部和主体接触部，该源极接触部电连接到源极端子。 身体接触部分与源极接触部分接触并且与身体区域电连接。

公开(公告)号：US20160307891A1

公开(公告)日：2016-10-20

申请号：US15096629

申请日：2016-04-12

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser

IPC: H01L27/088 ,  H01L29/78 ,  H01L29/10 ,  H01L29/40 ,  H01L29/417

CPC classification number: H01L29/4175 ,  H01L21/26586 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/1083 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/41775 ,  H01L29/66696 ,  H01L29/66704 ,  H01L29/7825

Abstract: A semiconductor device comprises a transistor in a semiconductor body having a main surface. The transistor comprises a source region, a drain region, a body region, a drift zone, and a gate electrode at the body region. The body region and the drift zone are disposed along a first direction between the source region and the drain region, the first direction being parallel to the main surface. The gate electrode is disposed in a trench extending in the first direction. The semiconductor device further comprises a source contact electrically connected to the source region and to a source terminal. The source contact is disposed in a source contact opening in the main surface. The semiconductor device further comprises a body contact portion electrically connected to the source terminal and to the body region. The body contact portion vertically overlaps with the source region.

Abstract translation: 半导体器件包括具有主表面的半导体本体中的晶体管。 晶体管包括源区域，漏极区域，体区域，漂移区域和在身体区域处的栅电极。 主体区域和漂移区域沿着源极区域和漏极区域之间的第一方向设置，第一方向平行于主表面。 栅电极设置在沿第一方向延伸的沟槽中。 半导体器件还包括电源连接到源极区域和源极端子的源极触点。 源触点设置在主表面中的源极接触开口中。 半导体器件还包括电连接到源极端子和主体区域的主体接触部分。 身体接触部垂直与源区重叠。

公开(公告)号：US20160268423A1

公开(公告)日：2016-09-15

申请号：US14656041

申请日：2015-03-12

Applicant: Infineon Technologies AG

Inventor： Karoline Koepp ,  Andreas Meiser ,  Till Schloesser

IPC: H01L29/78 ,  H01L29/40 ,  H01L27/088

CPC classification number: H01L29/7825 ,  H01L21/823456 ,  H01L21/823481 ,  H01L21/823487 ,  H01L27/088 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/407 ,  H01L29/4236 ,  H01L29/66681 ,  H01L29/7813 ,  H01L29/7823 ,  H01L29/7835

Abstract: A semiconductor device includes a transistor in a semiconductor substrate having a first main surface. The transistor includes a source region, a drain region, a channel region, a drift zone, and a gate electrode adjacent to at least two sides of the channel region. The gate electrode is disposed in trenches extending in a first direction parallel to the first main surface. The gate electrode is electrically coupled to a gate terminal. The channel region and the drift zone are disposed along the first direction between the source region and the drain region. The semiconductor device further includes a conductive layer beneath the gate electrode and insulated from the gate electrode. The conductive layer is electrically connected to the gate terminal.

Abstract translation: 半导体器件包括具有第一主表面的半导体衬底中的晶体管。 晶体管包括源极区域，漏极区域，沟道区域，漂移区域和与沟道区域的至少两侧相邻的栅电极。 栅电极设置在与第一主表面平行的第一方向上延伸的沟槽中。 栅极电连接到栅极端子。 沟道区域和漂移区沿着源极区域和漏极区域之间的第一方向设置。 半导体器件还包括在栅电极下方并与栅电极绝缘的导电层。 导电层电连接到栅极端子。

公开(公告)号：US09401399B2

公开(公告)日：2016-07-26

申请号：US14053633

申请日：2013-10-15

Applicant: Infineon Technologies AG

Inventor： Andreas Meiser ,  Till Schloesser ,  Franz Hirler

IPC: H01L29/76 ,  H01L29/94 ,  H01L27/108 ,  H01L29/423 ,  H01L29/78 ,  H01L29/06 ,  H01L29/808 ,  H01L29/40 ,  H01L29/417 ,  H01L29/10

CPC classification number: H01L29/7813 ,  H01L27/088 ,  H01L29/0653 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0865 ,  H01L29/0882 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/78 ,  H01L29/7811 ,  H01L29/7825 ,  H01L29/7835 ,  H01L29/7838 ,  H01L29/8083

Abstract: A semiconductor device includes a transistor formed in a semiconductor substrate including a main surface. The transistor includes a source region, a drain region, a channel region, and a gate electrode. The source region and the drain region are disposed along a first direction, the first direction being parallel to the main surface. The channel region has a shape of a ridge extending along the first direction, the ridge including a top side and a first and a second sidewalls. The gate electrode is disposed at the first sidewall of the channel region, and the gate electrode is absent from the second sidewall of the channel region.

Abstract translation: 半导体器件包括形成在包括主表面的半导体衬底中的晶体管。 晶体管包括源极区，漏极区，沟道区和栅电极。 源极区域和漏极区域沿着第一方向设置，第一方向平行于主表面。 沟道区具有沿着第一方向延伸的脊的形状，脊包括顶侧和第一和第二侧壁。 栅电极设置在沟道区的第一侧壁处，栅电极不存在于沟道区的第二侧壁。

公开(公告)号：US09351382B2

公开(公告)日：2016-05-24

申请号：US14835491

申请日：2015-08-25

Applicant: Infineon Technologies AG

Inventor： Andrea Logiudice ,  Andreas Meiser

IPC: H01L29/66 ,  H05B37/03 ,  H05B33/08 ,  G09G3/00

CPC classification number: H05B37/03 ,  G09G3/006 ,  H01L33/0095 ,  H05B33/0824 ,  H05B33/083 ,  Y10T29/49117 ,  Y10T307/406

Abstract: In various embodiments, a device is provided. The device includes a substrate having a first side and a second side opposite the first side. The substrate includes a plurality of driver circuits at the first side of the substrate. Each of the plurality of driver circuits is configured to drive a current from the first side of the substrate to the second side of the substrate. The device further includes at least one load interface at the second side of the substrate. The at least one load interface is configured to couple the current from the plurality of the driver circuits to a plurality of loads at the second side of the substrate.