公开(公告)号：US11251365B2

公开(公告)日：2022-02-15

申请号：US15942231

申请日：2018-03-30

Applicant: Intel Corporation

Inventor： Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Ian Young ,  Kevin O'Brien ,  Gary Allen ,  Noriyuki Sato

IPC: H01L43/10 ,  G11C11/16 ,  H01L27/22 ,  H01L43/04 ,  H01L43/06 ,  H01L43/14 ,  B82Y25/00

Abstract: An apparatus is provided which comprises: a magnetic junction having a magnet with a first magnetization; an interconnect adjacent to the magnetic junction, wherein the interconnect comprises an antiferromagnetic (AFM) material which is doped with a doping material (Pt, Ni, Co, or Cr) and a structure adjacent to the interconnect such that the magnetic junction and the structure are on opposite surfaces of the interconnect, wherein the structure comprises a magnet with a second magnetization substantially different from the first magnetization.

公开(公告)号：US20210408375A1

公开(公告)日：2021-12-30

申请号：US16915600

申请日：2020-06-29

Applicant: Intel Corporation

Inventor： Chelsey Dorow ,  Kevin O'Brien ,  Carl Naylor ,  Uygar Avci ,  Sudarat Lee ,  Ashish Verma Penumatcha ,  Chia-Ching Lin ,  Tanay Gosavi ,  Shriram Shivaraman ,  Kirby Maxey

IPC: H01L45/00 ,  H01L27/24

Abstract: A transistor includes a channel including a first layer including a first monocrystalline transition metal dichalcogenide (TMD) material, where the first layer is stoichiometric and includes a first transition metal. The channel further includes a second layer above the first layer, the second layer including a second monocrystalline TMD material, where the second monocrystalline TMD material includes a second transition metal and oxygen, and where the second layer is sub-stoichiometric. The transistor further includes a gate electrode above a first portion of the channel layer, a gate dielectric layer between the channel layer and the gate electrode, a source contact on a second portion of the channel layer and a drain contact on a third portion of the channel layer, where the gate electrode is between drain contact and the source contact.

公开(公告)号：US11062752B2

公开(公告)日：2021-07-13

申请号：US16246358

申请日：2019-01-11

Applicant: Intel Corporation

Inventor： Tofizur Rahman ,  James Pellegren ,  Angeline Smith ,  Christopher Wiegand ,  Noriyuki Sato ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Benjamin Buford ,  Ian Young

IPC: G11C11/16 ,  H01L43/10 ,  H01L27/22 ,  H01L43/12 ,  H01L43/02 ,  H01L43/08

Abstract: A perpendicular spin orbit torque memory device includes a first electrode having tungsten and at least one of nitrogen or oxygen and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first magnet, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.

公开(公告)号：US20210013397A1

公开(公告)日：2021-01-14

申请号：US16955723

申请日：2018-03-09

Applicant: Intel Corporation

Inventor： Kevin O'Brien ,  Kaan Oguz ,  Charles Kuo ,  Mark Doczy ,  Noriyuki Sato

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10 ,  H01L43/12

Abstract: A pSTTM device includes a first electrode and a second electrode, a free magnet between the first electrode and the second electrode, a fixed magnet between the first electrode and the second electrode, a tunnel barrier between the free magnet and the fixed magnet, a coupling layer between the free magnet and the first electrode, where the coupling layer comprises a metal and oxygen and a follower between the coupling layer and the first electrode, wherein the follower comprises a magnetic skyrmion. The skyrmion follower may be either magnetically and electrically coupled to the free magnet to form a coupled system of switching magnetic layers. In an embodiment, the skyrmion follower has a weaker magnetic anisotropy than an anisotropy of the free magnet.

公开(公告)号：US20200227104A1

公开(公告)日：2020-07-16

申请号：US16246358

申请日：2019-01-11

Applicant: Intel Corporation

Inventor： Tofizur Rahman ,  James Pellegren ,  Angeline Smith ,  Christopher Wiegand ,  Noriyuki Sato ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Kaan Oguz ,  Kevin O'Brien ,  Benjamin Buford ,  Ian Young

IPC: G11C11/16 ,  H01L27/22 ,  H01L43/12

Abstract: A perpendicular spin orbit torque memory device includes a first electrode having tungsten and at least one of nitrogen or oxygen and a material layer stack on a portion of the first electrode. The material layer stack includes a free magnet, a fixed magnet above the first magnet, a tunnel barrier between the free magnet and the fixed magnet and a second electrode coupled with the fixed magnet.

公开(公告)号：US12266720B2

公开(公告)日：2025-04-01

申请号：US17129486

申请日：2020-12-21

Applicant: Intel Corporation

Inventor： Carl Naylor ,  Chelsey Dorow ,  Kevin O'Brien ,  Sudarat Lee ,  Kirby Maxey ,  Ashish Verma Penumatcha ,  Tanay Gosavi ,  Patrick Theofanis ,  Chia-Ching Lin ,  Uygar Avci ,  Matthew Metz ,  Shriram Shivaraman

IPC: H01L29/76 ,  H01L21/02 ,  H01L21/8256 ,  H01L27/092 ,  H01L29/24

Abstract: Transistor structures with monocrystalline metal chalcogenide channel materials are formed from a plurality of template regions patterned over a substrate. A crystal of metal chalcogenide may be preferentially grown from a template region and the metal chalcogenide crystals then patterned into the channel region of a transistor. The template regions may be formed by nanometer-dimensioned patterning of a metal precursor, a growth promoter, a growth inhibitor, or a defected region. A metal precursor may be a metal oxide suitable, which is chalcogenated when exposed to a chalcogen precursor at elevated temperature, for example in a chemical vapor deposition process.

公开(公告)号：US11605592B2

公开(公告)日：2023-03-14

申请号：US16232524

申请日：2018-12-26

Applicant: Intel Corporation

Inventor： Noriyuki Sato ,  Kevin Lin ,  Kevin O'Brien ,  Hui Jae Yoo

IPC: H01L23/532 ,  H01L43/10 ,  H01L43/12 ,  H01L23/522 ,  H01L21/768 ,  H01L21/3213

Abstract: A multilayer conductive line is disclosed. The multilayer conductive line includes a dielectric layer, a Ta barrier layer on the dielectric layer and a superlattice on the Ta barrier layer. The superlattice includes a plurality of interleaved ferromagnetic and non-ferromagnetic material.

公开(公告)号：US11508903B2

公开(公告)日：2022-11-22

申请号：US16022094

申请日：2018-06-28

Applicant: Intel Corporation

Inventor： Angeline Smith ,  Ian Young ,  Kaan Oguz ,  Sasikanth Manipatruni ,  Christopher Wiegand ,  Kevin O'Brien ,  Tofizur Rahman ,  Noriyuki Sato ,  Benjamin Buford ,  Tanay Gosavi

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/10

Abstract: An insertion layer for perpendicular spin orbit torque (SOT) memory devices between the SOT electrode and the free magnetic layer, memory devices and computing platforms employing such insertion layers, and methods for forming them are discussed. The insertion layer is predominantly tungsten and improves thermal stability and perpendicular magnetic anisotropy in the free magnetic layer.

公开(公告)号：US20220199783A1

公开(公告)日：2022-06-23

申请号：US17133087

申请日：2020-12-23

Applicant: Intel Corporation

Inventor： Ashish Verma Penumatcha ,  Kevin O'Brien ,  Chelsey Dorow ,  Kirby Maxey ,  Carl Naylor ,  Tanay Gosavi ,  Sudarat Lee ,  Chia-Ching Lin ,  Seung Hoon Sung ,  Uygar Avci

IPC: H01L29/24 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L27/22 ,  H01L27/24

Abstract: A transistor includes a first channel layer over a second channel layer, where the first and the second channel layers include a monocrystalline transition metal dichalcogenide (TMD). The transistor structure further includes a source structure coupled to a first end of the first and second channel layers, a drain structure coupled to a second end of the first and second channel layers, a gate structure between the source material and the drain material, and between the first channel layer and the second channel layer. The transistor further includes a spacer laterally between the gate structure and the and the source structure and between the gate structure and the drain structure. A liner is between the spacer and the gate structure. The liner is in contact with the first channel layer and the second channel layer and extends between the gate structure and the respective source structure and the drain structure.

公开(公告)号：US11257613B2

公开(公告)日：2022-02-22

申请号：US15942434

申请日：2018-03-31

Applicant: Intel Corporation

Inventor： Kaan Oguz ,  Tanay Gosavi ,  Sasikanth Manipatruni ,  Charles Kuo ,  Mark Doczy ,  Kevin O'Brien

IPC: H01F10/32 ,  H01F41/30 ,  G11C11/16 ,  H01L43/12 ,  H01L27/22 ,  H01L43/08 ,  H01L43/10

Abstract: A perpendicular spin orbit torque (SOT) memory device includes an electrode having a spin orbit torque material, where the SOT material includes iridium and manganese and a perpendicular magnetic tunnel junction (pMTJ) device on a portion of the electrode. The pMTJ device includes a free magnet structure electrode, a fixed layer and a tunnel barrier between the free layer and the fixed layer and a SAF structure above the fixed layer. The Ir—Mn SOT material and the free magnet have an in-plane magnetic exchange bias.