IMPEDANCE MATCHING NETWORKS FOR NON-LINEAR CIRCUITS

    公开(公告)号:CA2351327C

    公开(公告)日:2010-05-18

    申请号:CA2351327

    申请日:1999-12-03

    Applicant: QUALCOMM INC

    Abstract: Techniques to reduce intermodulation distortion at the output of an active circuit having even-order and odd-order nonlinearities. The IM3 products generated by the even-order nonlinearity of the active circuit are canceled against the IM3 products generated by the odd-order nonlinearity. The amplitude and phase of the IM3 products can be manipulated by adjusting either the source or load impedance, or both, of the active circuit. The amplitude and phase of the IM2 products generated by the even-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at subharmonic and second harmonic frequencies (i.e., the frequencies of the IM2 products). By properly tuning or "matching" the impendance of either the source or load, or both, of the active circuit at either the sub-harmonic or second harmonic frequency, or both, the amplitude and phase of the IM2 products can be adjusted such that the IM3 products resulting from the even-order nonlinearity approximately cancel the IM3 product.

    42.
    发明专利
    未知

    公开(公告)号:DE60235758D1

    公开(公告)日:2010-05-06

    申请号:DE60235758

    申请日:2002-04-17

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: The present invention provides a technique for selective cancellation of the 2nd-order or 3rd-order nonlinearity of a transistor. Any nonlinearity is a function of the bias voltage of a transistor. In many cases, this function is such that, at a particular bias voltage, nonlinearity is zero. The invention provides a bias circuit that generates the optimum bias voltage for a transistor at which its selected nonlinearity is zero. Mathematically, the nonlinearity can be represented by a sum of multiple components where some components have negative sign. The components are proportional to the DC currents of the transistor at bias voltages differing by a small amount. The bias circuit includes bias transistors that are scaled versions of the main transistor. Each bias transistor generates a DC current representing one of the components. The currents are combined according to the signs of the respective components to form a DC signal proportional to the selected nonlinearity. A feedback circuit senses the DC signal and generates the bias voltages of the bias transistors that force the DC signal to be zero. One of the bias voltages is applied to the main transistor resulting in cancellation of its selected nonlinearity. The system may be readily implemented using the integrated circuit technology such that the transistors of the bias circuit are closely matched to each other and to the main transistor. The distortion cancellation effect provided by the present invention exhibits low sensitivity to variations in the transistor processing and operational temperature.

    BIAS METHOD AND CIRCUIT FOR DISTORTION REDUCTION

    公开(公告)号:HK1064812A1

    公开(公告)日:2005-02-04

    申请号:HK04107420

    申请日:2004-09-24

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: The present invention provides a technique for selective cancellation of the 2nd-order or 3rd-order nonlinearity of a transistor. Any nonlinearity is a function of the bias voltage of a transistor. In many cases, this function is such that, at a particular bias voltage, nonlinearity is zero. The invention provides a bias circuit that generates the optimum bias voltage for a transistor at which its selected nonlinearity is zero. Mathematically, the nonlinearity can be represented by a sum of multiple components where some components have negative sign. The components are proportional to the DC currents of the transistor at bias voltages differing by a small amount. The bias circuit includes bias transistors that are scaled versions of the main transistor. Each bias transistor generates a DC current representing one of the components. The currents are combined according to the signs of the respective components to form a DC signal proportional to the selected nonlinearity. A feedback circuit senses the DC signal and generates the bias voltages of the bias transistors that force the DC signal to be zero. One of the bias voltages is applied to the main transistor resulting in cancellation of its selected nonlinearity. The system may be readily implemented using the integrated circuit technology such that the transistors of the bias circuit are closely matched to each other and to the main transistor. The distortion cancellation effect provided by the present invention exhibits low sensitivity to variations in the transistor processing and operational temperature.

    Circuit for linearizing electronic devices

    公开(公告)号:AU2002245066A1

    公开(公告)日:2002-07-24

    申请号:AU2002245066

    申请日:2001-10-31

    Applicant: QUALCOMM INC

    Abstract: A radio frequency amplifier with improved linearity and minimal third-order distortion. The amplifier includes a first transistor having first, second and third terminals with the first terminal being an input terminal and the second terminal being the output terminal and the third terminal being a common terminal. A linearization circuit is included having first and second terminals. The first terminal is connected to the common terminal of the transistor and the second terminal is connected to the input terminal of the transistor. In a specific embodiment, the linearization circuit is implemented as a unity gain buffer with an input terminal connected to the common terminal of the transistor and an output terminal connected to the input terminal of the transistor. In accordance with the inventive teachings, the buffer has a low gain and high output impedance at first frequency (f1) of a first signal applied to the circuit and a second frequency (f2) of a second signal applied to the circuit and a unity gain and low output impedance a difference between the first and second frequencies. In another specific embodiment, the inductor is inserted between the output of the unity gain buffer and the input terminal of the transistor. In alternative embodiments, circuitry is shown for providing a direct current offset at the input of the transistor. As another alternative, the linearization circuit consists of series inductor and capacitor connected between the common and input terminals of the transistor. In yet another embodiment, the linearization circuit consists of the first and the second series inductor and capacitor circuits. The first series LC circuit is connected between the common terminal of the transistor and ground and the second series LC circuit is connected between the input terminal of the transistor and ground.

    Impedance matching networks for non-linear circuits

    公开(公告)号:NZ511679A

    公开(公告)日:2002-06-28

    申请号:NZ51167999

    申请日:1999-12-03

    Applicant: QUALCOMM INC

    Abstract: Techniques to reduce intermodulation distortion at the output of an active circuit having even-order and odd-order nonlinearities. The IM3 products generated by the even-order nonlinearity of the active circuit are canceled against the IM3 products generated by the odd-order nonlinearity. The amplitude and phase of the IM3 products can be manipulated by adjusting either the source or load impedance, or both, of the active circuit. The amplitude and phase of the IM2 products generated by the even-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at sub-harmonic and second harmonic frequencies (i.e., the frequencies of the IM2 products). The amplitude and phase of the IM3 products generated by the odd-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at the fundamental frequency. By properly tuning or "matching" the impedance of either the source or load, or both, of the active circuit at either the sub-harmonic or second harmonic frequency, or both, the amplitude and phase of the IM2 products can be adjusted such that the IM3 products resulting from the even-order nonlinearity approximately cancel the IM3 product(s) resulting from the odd-order nonlinearity.

    METHOD AND IMPEDANCE MATCHING NETWORKS FOR REDUCING INTERMODULATION DISTORTION OF ACTIVE CIRCUITS

    公开(公告)号:HK1040009A1

    公开(公告)日:2002-05-17

    申请号:HK02101496

    申请日:2002-02-27

    Applicant: QUALCOMM INC

    Abstract: Techniques to reduce intermodulation distortion at the output of an active circuit having even-order and odd-order nonlinearities. The IM3 products generated by the even-order nonlinearity of the active circuit are canceled against the IM3 products generated by the odd-order nonlinearity. The amplitude and phase of the IM3 products can be manipulated by adjusting either the source or load impedance, or both, of the active circuit. The amplitude and phase of the IM2 products generated by the even-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at sub-harmonic and second harmonic frequencies (i.e., the frequencies of the IM2 products). The amplitude and phase of the IM3 products generated by the odd-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at the fundamental frequency. By properly tuning or "matching" the impedance of either the source or load, or both, of the active circuit at either the sub-harmonic or second harmonic frequency, or both, the amplitude and phase of the IM2 products can be adjusted such that the IM3 products resulting from the even-order nonlinearity approximately cancel the IM3 product(s) resulting from the odd-order nonlinearity.

    48.
    发明专利
    未知

    公开(公告)号:BR0007511A

    公开(公告)日:2002-01-29

    申请号:BR0007511

    申请日:2000-01-13

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: Many applications require the conversion of a differential current signal into a single-ended signal. The shortcomings encountered with existing approaches include poor conversion efficiency, limited bandwidth, and large size. The converter disclosed uses active devices to obtain a unit of small size and high efficiency having a wide bandwidth of operation.

    49.
    发明专利
    未知

    公开(公告)号:NO20013482L

    公开(公告)日:2001-09-14

    申请号:NO20013482

    申请日:2001-07-13

    Applicant: QUALCOMM INC

    Inventor: APARIN VLADIMIR

    Abstract: Many applications require the conversion of a differential current signal into a single-ended signal. The shortcomings encountered with existing approaches include poor conversion efficiency, limited bandwidth, and large size. The converter disclosed uses active devices to obtain a unit of small size and high efficiency having a wide bandwidth of operation.

    50.
    发明专利
    未知

    公开(公告)号:NO20012706D0

    公开(公告)日:2001-06-01

    申请号:NO20012706

    申请日:2001-06-01

    Applicant: QUALCOMM INC

    Abstract: Techniques to reduce intermodulation distortion at the output of an active circuit having even-order and odd-order nonlinearities. The IM3 products generated by the even-order nonlinearity of the active circuit are canceled against the IM3 products generated by the odd-order nonlinearity. The amplitude and phase of the IM3 products can be manipulated by adjusting either the source or load impedance, or both, of the active circuit. The amplitude and phase of the IM2 products generated by the even-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at sub-harmonic and second harmonic frequencies (i.e., the frequencies of the IM2 products). The amplitude and phase of the IM3 products generated by the odd-order nonlinearity can be manipulated by adjusting the impedance of the active circuit at the fundamental frequency. By properly tuning or "matching" the impedance of either the source or load, or both, of the active circuit at either the sub-harmonic or second harmonic frequency, or both, the amplitude and phase of the IM2 products can be adjusted such that the IM3 products resulting from the even-order nonlinearity approximately cancel the IM3 product(s) resulting from the odd-order nonlinearity.

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